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Parallel Implementations of Block-Based Motion Vector Estimation for Video Compression on Four Parallel Processing Systems

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Abstract

Parallel algorithms, based on a distributed memory machine model, for an exhaustive search technique for motion vector estimation in video compression are being designed and evaluated. Results from the execution on a 16,384 processor MasPar MP-1 (an SIMD machine), a 140 node Intel Paragon XP/S and a 16 node IBM SP2 (two M IMD machines), and the 16 processor PASM prototype (a partitionable SIMD/MIMD mixed-mode machine) are presented. The trade-offs of using different modes of parallelism (SIMD, SPMD, and mixed-mode) and different data partitioning schemes (the rectangular and stripe subimage methods) are examined. The analytical and experimental results shown in this application study will help practitioners to predict and contrast the performance of different approaches to parallel implementation of this important video compression technique. The results presented are also applicable to a large class of image and video processing tasks. Case studies, such as the one presented here, are a necessary step in developing software tools for mapping an application task onto a single parallel machine and for mapping a set of independent application tasks, or the subtasks of a single application task, onto a heterogeneous suite of parallel machines.

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Authors
  1. Min Tan
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  2. Janet M. Siegel
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  3. Howard Jay Siegel
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Tan, M., Siegel, J.M. & Siegel, H.J. Parallel Implementations of Block-Based Motion Vector Estimation for Video Compression on Four Parallel Processing Systems. International Journal of Parallel Programming 27, 195–225 (1999). https://doi.org/10.1023/A:1018785512609

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