Abstract
The processing requirements for high speed datacommunication systems (symbol rates in excess of 5 MHz)are beyond the capabilities of programmable devices suchas DSP chips and FPGAs. Designers of such systems have traditionally incurred the highnone recurring engineering (NRE) costs and longdevelopment times associated with custom ASICimplementations. In this paper we highlight an emergingtrend in the development of parametrizable, high speeddatapaths for application in data communications. Suchcircuits can deliver the high throughputs associatedwith traditional ASIC implementations while at the same time provide the user with the ability tovary key system parameters, or even redefine the circuitfunctionality among a finite number of alternatives.They have the potential to significantly reduce the cost of implementing high-speed datacommunication systems by reducing the NRE costs.Moreover, the ability to use the same piece of hardwarein a large number of different systems provides further price reductions due to economies of scale. Inorder to bring out key concepts associated with thedesign of such systems, the paper provides an in-depthdescription of three sample circuits. They are: (a) A versatile rake-receiver architecture foruse in DSSS-CDMA based systems; (b) A highlyreconfigurable baseband processing engine forapplication in a host of systems based on single carriermodulation; and (c) A highly versatile beamformingIC.
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Daneshrad, B., Duan, JN., Grayver, E. et al. Parametrizable VLSI Application Specific Datapaths for High Speed Data Communications. International Journal of Wireless Information Networks 6, 285–301 (1999). https://doi.org/10.1023/A:1018820425528
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DOI: https://doi.org/10.1023/A:1018820425528