A general scheme for constructing optimal bus based architectures for hypercubes

Abstract

We present a general methodology for constructing optimal bus based hypercubes. The methodology encompasses previously proposed bus based hypercubes. If m _n is the total number of different unidirectional Multiple Bus Systems (MBSs) that can optimally emulate the n‐dimensional hypercube, then σ_n≤ m _n ≤σ_n, where σ _n denotes the number of unlabeled trees on n edges. Each such MBS is symmetric with respect to the buses and processors, and has n + 1 ports per processor, whereas the hypercube has 2n ports per processor. We choose one specific MBS from those optimal MBSs and demonstrate its other attractive properties. It can simultaneously perform data transfers across as many as n dimensions. It is fault tolerant with respect to a bus, a processor, or an interface failure. We also show how to construct optimal bidirectional MBSs emulating hypercubes. The new architecture is very similar to the unidirectional one; yet it has half the number of buses and half the number of interfaces. It can simultaneously transfer data across as many as n dimensions. Its fault tolerance is similar to that of the unidirectional MBS.