Abstract
Power and energy constraints are becoming increasingly prevalent in real-time embedded systems. Voltage-scaling is a promising technique to reduce energy and power consumption: clock speed tends to decrease linearly with supply voltage while power consumption goes down quadratically. We therefore have a tradeoff between the energy consumption of a task and the speed with which it can be completed. The timing constraints associated with real-time tasks can be used to resolve this tradeoff. In this paper, we present two algorithms for voltage-scaling. Assuming that a processor can operate in one of two modes: high voltage and low voltage, we show how to schedule the voltage settings so that deadlines are met while reducing the total energy consumed. We show that significant reductions can be made in energy consumption.
Similar content being viewed by others
References
Amirtharajah, R., and Chandrakasan, A. 1997. Self-powered low power signal processing. IEEE Symposium on VLSI Circuits, pp. 25-26
Arshak, K. I., and Almukhtar, B. 1999. The design and development of a novel flyback planar transformer for high frequency switch model DC-DC converter applications-Part 1. 22nd IEEE International Conference on Microelectronics, pp. 505-508.
Audsley, N., Burns, A., Richardson, M., and Wellings, A. 1991. Hard real-time scheduling: the deadline-monotonic approach. In Eighth IEEE Workshop on Real-Time Operating Systems and Software, pp. 133-137.
Chang, J.-M., and Pedram, M. 1997. Energy minimization using multiple supply voltages. IEEE Transactions on VLSI Systems 5(4): 436-443.
Govil, K., Chan, E., and Wasserman, H. 1995. Comparing algorithms for dynamic speed-setting of a low-power CPU. In Proceedings of the 1st International Conference on Mobile Computing and Networking, MOBICOM 1995, November, pp. 13-25.
Hong, I., Kirovski, D., Qu, G., Potkonjak, M., and Srivastava, M. B. 1998. Power optimization of variable voltage core-based systems. In Proceedings?Design Automation Conference, pp. 176-181.
Ishihara, T., and Yasuura, H. 1998. Voltage scheduling problem for dynamically variable voltage processors. International Symposium on Low Power Electronics and Desin, August, pp. 197-202.
Krishna, C. M., and Shin, K. G. 1997. Real-time Systems. New York: McGraw-Hill.
Lehoczky, J., Sha, L., and Ding, Y. 1989. The rate-monotonic scheduling algorithm: exact characteristics and average case behavior. In Proceedings of the IEEE Real-Time Systems Symposium, December, pp. 166-171.
Lehoczky, J. 1990. Fixed priority scheduling for periodic task sets with arbitrary deadlines. In Proceedings of the IEEE Real-Time Systems Symposium, December, pp. 201-209.
Liu, C. L., and Layland, J. W. 1973. Scheduling algorithms for multiprogramming in hard real time environment. Journal of the Association for Computing Machinery 20(1): 46-61.
Mangat, S., Xi, Y., Jain, P. K., and Liu, Y. F. 1998. A modified asymmetrical pulse-width-modulated resonant DC/DC converter topology. 29th Annual IEEE Power Electronics Specialists Conference, pp. 662-668.
MPC860 PowerPC Hardware Specification 1998. PC860EC/D, Motorola, December.
Pering, T., Burd, T., and Brodersen, R. 1998. The simulation and evaluation of dynamic voltage scaling algorithms. In International Symposium on Low Power Electronics and Design, August, pp. 76-81.
Raghunathan, A., Jha, N., and Dey, S. 1998. High-level Power Analysis and Optimization. Boston, MA: Kluwer Academic Publishers.
Weiser, M., Wilch, B., Demers, A., and Shenker, S. 1994. Scheduling for reduced CPU energy. In Proceedings of the 1st USENIX A Static Task-Orient Scheduling Symposium on Operating Systems Design and Implementation, November, pp. 13-23.
Yeap, G. K. 1998. Practical Low Power Digital VLSI Design. Boston, MA: Kluwer Academic Publishers.
Yao, F., Demers, A., and Shenker, A. 1995. A scheduling model for reduced CPU energy. IEEE Foundations of Computer Science, pp. 374-382.
Introduction to Thumb, Version 2.0, March 1995, ARM DVI-0001A, Advanced RISC Machines Ltd. ongHo HhHo
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Lee, YH., Krishna, C.M. Voltage-Clock Scaling for Low Energy Consumption in Fixed-Priority Real-Time Systems. Real-Time Systems 24, 303–317 (2003). https://doi.org/10.1023/A:1022864617640
Issue Date:
DOI: https://doi.org/10.1023/A:1022864617640