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BIST-Based Delay-Fault Testing in FPGAs

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Abstract

We present the first delay-fault testing approach for Field Programmable Gate Arrays (FPGAs), applicable for on-line testing as well as for off-line manufacturing and system-level testing. Our approach is based on Built-In Self-Test (BIST), it is comprehensive, and does not require expensive external test equipment (ATE). We have successfully implemented this BIST approach for delay-fault testing on the Lattice ORCA 2C and Xilinx Spartan FPGAs.

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Authors and Affiliations

  1. DAFCA, Berkeley Heights, NJ, 07922, USA

    Miron Abramovici

  2. Electrical and Computer Engineering, Auburn University, Auburn, AL, 36849, USA

    Charles E. Stroud

Authors
  1. Miron Abramovici
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  2. Charles E. Stroud
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Abramovici, M., Stroud, C.E. BIST-Based Delay-Fault Testing in FPGAs. Journal of Electronic Testing 19, 549–558 (2003). https://doi.org/10.1023/A:1025126030727

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  • DOI: https://doi.org/10.1023/A:1025126030727

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