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Searching for Global Test Costs Optimization in Core-Based Systems

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Abstract

This paper proposes a comprehensive model for test planning and design space exploration in a core-based environment. The proposed approach relies on the reuse of available system resources for the definition of the test access mechanism, and for the optimization of several cost factors (area overhead, pin count, power constraints and test time). The use of an expanded test access model and its concurrent definition with the system test schedule makes it possible the search for a cost effective global solution. Experimental results over the ITC'02 SOC Test Benchmarks show the variety of trade-offs that can be explored using the proposed model, and its effectiveness on optimizing the system test planning.

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Authors and Affiliations

  1. PPGC—Instituto de Informática, Universidade Federal do Rio Grande do Sul, P.O. Box, 15064, Porto Alegre, 91501-970, Brazil

    Érika Cota

  2. PPGEE—Electrical Engineering Department and PPGC—Instituto de Informática, Universidade Federal do Rio Grande do Sul, Av. Osvaldo Aranha, 103, Porto Alegre, 90035-190, Brazil

    Luigi Carro & Marcelo Lubaszewski

  3. Computer Science and Engineering Department, University of California, San Diego, La Jolla, CA, 92093, USA

    Alex Orailoğlu

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  1. Érika Cota
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  2. Luigi Carro
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  3. Marcelo Lubaszewski
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  4. Alex Orailoğlu
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Cota, É., Carro, L., Lubaszewski, M. et al. Searching for Global Test Costs Optimization in Core-Based Systems. Journal of Electronic Testing 20, 357–373 (2004). https://doi.org/10.1023/B:JETT.0000039604.64927.0f

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  • DOI: https://doi.org/10.1023/B:JETT.0000039604.64927.0f

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