Abstract
In this paper a new circuit for concurrent soft and timing error detection in CMOS ICs is presented. The circuit is based on current mode sense amplifier topologies to provide fast error detection times. After an error has been detected it can be corrected by using a retry cycle.
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Matakias, S., Tsiatouhas, Y., Arapoyanni, A. et al. A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs. Journal of Electronic Testing 20, 523–531 (2004). https://doi.org/10.1023/B:JETT.0000042516.12841.36
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DOI: https://doi.org/10.1023/B:JETT.0000042516.12841.36