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Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders

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Abstract

The Koetter-Vardy algorithm is an algebraic soft-decision decoder for Reed-Solomon codes which is based on the Guruswami-Sudan list decoder. There are three main steps: (1) multiplicity calculation, (2) interpolation and (3) root finding. The Koetter-Vardy algorithm seems challenging to implement due to the high cost of interpolation. Motivated by a VLSI implementation viewpoint we propose an improvement to the interpolation algorithm that uses a transformation of the received word to reduce the number of iterations. We show how to reduce the memory requirements and give an efficient VLSI implementation for the Hasse derivative.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, McGill University, 3480, University Street, Montreal, Quebec, H3A 2A7, Canada

    Warren J. Gross

  2. Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, 10, King's College Road, Toronto, Ontario, M5S 3G4, Canada

    Frank R. Kschischang & P. Glenn Gulak

  3. Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, Urbana, IL, 61801, USA

    Ralf Koetter

Authors
  1. Warren J. Gross
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  2. Frank R. Kschischang
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  3. Ralf Koetter
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  4. P. Glenn Gulak
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Gross, W.J., Kschischang, F.R., Koetter, R. et al. Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 39, 93–111 (2005). https://doi.org/10.1023/B:VLSI.0000047274.68702.8d

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  • DOI: https://doi.org/10.1023/B:VLSI.0000047274.68702.8d

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