Efficient hardware structure for various binarization algorithms

Jae Ho Kim; Young Hoon Jeong; Chae Kwan Lee; Chang Dae Park

doi:10.1117/12.271606

4 April 1997 Efficient hardware structure for various binarization algorithms

Jae Ho Kim, Young Hoon Jeong, Chae Kwan Lee, Chang Dae Park

Proceedings Volume 3018, Color Imaging: Device-Independent Color, Color Hard Copy, and Graphic Arts II; (1997) https://doi.org/10.1117/12.271606
Event: Electronic Imaging '97, 1997, San Jose, CA, United States

Abstract

In this paper, a novel and unified hardware structure to implement various binarization algorithms is proposed. It is designed to perform: 1) simple thresholding, 2) high pass filtering, 3) dithering, 4) blue noise masking, 5) error diffusion, 6) threshold nodulated error diffusion, and 7) edge enhanced error diffusion. In general, these algorithms have been implemented with several logic blocks. We found that a single data path architecture can be used for implementing those algorithms. A new structure is designed to have same data-flow that can share the blocks. All processing is possible in the proposed unified architecture which is based on the threshold modulated and edge enhanced error diffusion scheme. This structure has error filter coefficient registers, error memory, threshold memory, and arithmetic units, etc. This paper shows that the proposed hardware structure reduces the number of gates efficiently. The hardware design and debugging complexity is reduced by the unified control logic and data path.

Citation Download Citation

Jae Ho Kim, Young Hoon Jeong, Chae Kwan Lee, and Chang Dae Park "Efficient hardware structure for various binarization algorithms", Proc. SPIE 3018, Color Imaging: Device-Independent Color, Color Hard Copy, and Graphic Arts II, (4 April 1997); https://doi.org/10.1117/12.271606

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KEYWORDS

Diffusion

Modulation

Linear filtering

Logic

Multiplexers

Image enhancement

Image quality

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