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Synthesis of Self-Checking Combination Devices Based on Allocating Special Groups of Outputs

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Abstract

We propose a new structure of a self-checking combinational device where, based on the properties of parity and Berger codes, as well as a code with the detection of all double errors in information vectors, the problem of detecting all single faults of logical elements can be solved without transforming the structure of the source device. The properties of binary codes with the detection of all double errors that can be used in constructing the proposed structure are considered. We give an example of constructing a new structure.

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Authors and Affiliations

  1. “LocoTech-Signal” LLC, Moscow, Russia

    D. V. Efanov

  2. Russian University of Transport, Moscow, Russia

    D. V. Efanov

  3. Emperor Alexander I St. Petersburg State Transport University, St. Petersburg, Russia

    V. V. Sapozhnikov & Vl. V. Sapozhnikov

Authors
  1. D. V. Efanov
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  2. V. V. Sapozhnikov
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  3. Vl. V. Sapozhnikov
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Correspondence to D. V. Efanov.

Additional information

Original Russian Text © D.V. Efanov, V.V. Sapozhnikov, Vl.V. Sapozhnikov, 2018, published in Avtomatika i Telemekhanika, 2018, No. 9, pp. 79–94.

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Efanov, D.V., Sapozhnikov, V.V. & Sapozhnikov, V.V. Synthesis of Self-Checking Combination Devices Based on Allocating Special Groups of Outputs. Autom Remote Control 79, 1609–1620 (2018). https://doi.org/10.1134/S0005117918090060

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  • DOI: https://doi.org/10.1134/S0005117918090060

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