Skip to content
Licensed Unlicensed Requires Authentication Published by De Gruyter Oldenbourg October 7, 2020

From transistor level to cyber physical/hybrid systems: Formal verification using automatic compositional abstraction

  • Ahmad Tarraf

    M. Sc. Ahmad Tarraf received his B. Sc. in Mechatronics Engineering from RHU Lebanon in 2013 and his M. Sc. in Mechatronics Engineering with the Specialization: Simulation and control in 2016 from TU-Darmstadt. Since 2017 he is a research assistant at the Institute of Computer-Science, University of Frankfurt.

    ORCID logo EMAIL logo
    and Lars Hedrich

    Prof. Dr.-Ing. Lars Hedrich received the Diploma and Ph. D. degrees in electrical engineering from the University of Hannover, Hannover, Germany, in 1992 and 1997, respectively. He joined the University of Hannover as a Junior Professor, in 2002. Since 2004, he has been a Full Professor and the Head of the Design Methodology Group at the Institute of Computer-Science, University of Frankfurt.

Abstract

In this paper we present a methodology to automatically generate an accurate behavioral model from an analog circuit description. The current machine learning method is limited to circuits with up to 80 transistors, limiting our approach to small and mid size circuit blocks due to a state explosion problem. However, if complex building blocks such as IOT systems should be modeled, the current approach needs to recoup with feasible simulation and modeling time. To come up with a solution for this problem, we extend the current method by a compositional approach. The approach is illustrated upon an example from the area of autonomous driving. Our method decomposes this large example into smaller building blocks and models each of them automatically. All models are combined into a compositional hybrid automaton of the whole complex system.

Compared to the original state space, the building blocks operate on smaller and reduced state spaces and hence drastically reduce the complexity. Using a back-transformation on the compositional automaton, all values from the original state space can be reconstructed. Moreover, we perform a formal verification on the generated compositional automaton. Results from a meaningful example are presented and discussed.

ACM CCS:

Award Identifier / Grant number: 286525601

Funding statement: This paper presents results of the project faveAC funded by the DFG under the project number 286525601.

About the authors

Ahmad Tarraf

M. Sc. Ahmad Tarraf received his B. Sc. in Mechatronics Engineering from RHU Lebanon in 2013 and his M. Sc. in Mechatronics Engineering with the Specialization: Simulation and control in 2016 from TU-Darmstadt. Since 2017 he is a research assistant at the Institute of Computer-Science, University of Frankfurt.

Lars Hedrich

Prof. Dr.-Ing. Lars Hedrich received the Diploma and Ph. D. degrees in electrical engineering from the University of Hannover, Hannover, Germany, in 1992 and 1997, respectively. He joined the University of Hannover as a Junior Professor, in 2002. Since 2004, he has been a Full Professor and the Head of the Design Methodology Group at the Institute of Computer-Science, University of Frankfurt.

References

1. M. H. Zaki, S. Tahar, G. Bois, Formal verification of analog and mixed signal designs: A survey, Microelectronics Journal 39 (12) (2008) 1395–1404.10.1016/j.mejo.2008.05.013Search in Google Scholar

2. L. Yin, Y. Deng, P. Li, Verifying dynamic properties of nonlinear mixed-signal circuits via efficient SMT-based techniques, in: Proceedings of the International Conference on Computer-Aided Design, ICCAD’12, ACM, New York, NY, USA, 2012, pp. 436–442. doi:10.1145/2429384.2429474.Search in Google Scholar

3. L. Yin, Y. Deng, P. Li, Simulation-Assisted Formal Verification of Nonlinear Mixed-Signal Circuits with Bayesian Inference Guidance, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32 (7) (2013) 977–990. doi:10.1109/TCAD.2013.2245941.Search in Google Scholar

4. M. Barnasconi, M. Dietrich, K. Einwich, T. Vörtler, J. P. Chaput, M. M. Louërat, F. Pêcheux, Z. Wang, P. Cuenot, I. Neumann, T. Nguyen, R. Lucas, E. Vaumorin, UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases, IEEE Design Test 32 (6) (2015) 76–86. doi:10.1109/MDAT.2015.2427260.Search in Google Scholar

5. A. Tarraf, L. Hedrich, Behavioral modeling of transistor-level circuits using automatic abstraction to hybrid automata, in: Design Automation and Test in Europe (DATE), Florence, 2019.10.23919/DATE.2019.8715184Search in Google Scholar

6. A. Tarraf, L. Hedrich, Automatic abstraction of analog circuits to hybrid automata, in: 16. GMM/ITG-Fachtagung-ANALOG, 2018.Search in Google Scholar

7. N. Kochdumper, A. Tarraf, M. Rechmal, M. Olbrich, L. Hedrich, M. Althoff, Establishing reachset conformance for the formal analysis of analog circuits, in: ASP-DAC, 2020.10.1109/ASP-DAC47756.2020.9045120Search in Google Scholar

8. AMS HitKit – Process Design Kit (PDK) for Circuit Simulation, Austria Microsystems.Search in Google Scholar

9. W. Hartong, R. Klausen, L. Hedrich, Formal Verification for Nonlinear Analog Systems: Approaches to Model and Equivalence Checking, Advanced Formal Verification, R. Drechsler, ed., Kluwer Academic Publishers, Boston (2004), pp. 205–245.10.1007/1-4020-2530-0_6Search in Google Scholar

10. L. Hedrich, E. Barke, A formal approach to nonlinear analog circuit verification, in: Proc. IEEE/ACM International Conference on Computer-Aided Design ICCAD-95. Digest of Technical Papers, 5, pp. 123–127. doi:10.1109/ICCAD.1995.480002.Search in Google Scholar

11. S. Steinhorst, L. Hedrich, Advanced methods for equivalence checking of analog circuits with strong nonlinearities, Formal Methods in System Design 36 (2) (2010) 131–147.10.1007/s10703-009-0086-9Search in Google Scholar

12. J. Phillips, J. Afonso, A. Oliveira, L. M. Silveira, Analog macromodeling using kernel methods, in: Proceedings of the 2003 IEEE/ACM International Conference on Computer-Aided Design, IEEE Computer Society, 2003, p. 446.10.1109/ICCAD.2003.159722Search in Google Scholar

13. S. Steinhorst, L. Hedrich, Trajectory-directed discrete state space modeling for formal verification of nonlinear analog circuits, in: Proceedings of the International Conference on Computer-Aided Design, ACM, 2012, pp. 202–209.10.1145/2429384.2429423Search in Google Scholar

14. A. Davis, An overview of algorithms in Gnucap, in: University/Government/Industry Microelectronics Symp., 2003, pp. 360–361.Search in Google Scholar

15. A. Tarraf, L. Hedrich, Automatic abstraction of transistor level circuits to hybrid automata, in: Frontiers in Analog Circuit Design (FAC), 2018.Search in Google Scholar

16. A. Tarraf, L. Hedrich, Automatic modeling of transistor level circuits by hybrid systems with parameter variable matrices, in: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lausanne, Switzerland, 2019.10.1109/SMACD.2019.8795271Search in Google Scholar

17. M. Althoff, An introduction to CORA 2015, in: Proc. of the Workshop on Applied Verification for Continuous and Hybrid Systems.Search in Google Scholar

18. Cora 2018 Manual, https://tumcps.github.io/CORA/data/Cora2018Manual.pdf (2019).Search in Google Scholar

19. D. Schramm, M. Hiller, R. Bardini, Vehicle Dynamics, 2nd Edition, Springer, Berlin, 2018. doi:10.1007/978-3-662-54483-9.Search in Google Scholar

Received: 2020-02-03
Revised: 2020-09-03
Accepted: 2020-09-26
Published Online: 2020-10-07
Published in Print: 2020-12-16

© 2020 Walter de Gruyter GmbH, Berlin/Boston

Downloaded on 28.4.2024 from https://www.degruyter.com/document/doi/10.1515/itit-2020-0004/html
Scroll to top button