Abstract
Approximate Computing (AC) and Stochastic Computing (SC) have been studied as new computing paradigms to achieve energy-efficient designs for error-tolerant applications. The hardware cost of SC generally can be small compared to that of AC, but SC has not been applied to a wide range of applications as AC because SC needs very long cycles to use long random bit strings called Stochastic Numbers (SNs) when we need to maintain the desired precision. To mitigate this disadvantage of SC, we propose a new idea to approximate numbers represented by SNs; our idea is to use multiple SNs to represent one number. Indeed our method can shorten the length of SNs drastically while keeping the precision level compared to conventional SNs. We study two specific cases where we use two and three shorter bit-strings to represent a single conventional SN, which we call a dual-rail and a triple-rail SNs, respectively. We also discuss a general case when we use many SNs corresponding to a single conventional SNs. We also compare triple-rail, dual-rail and conventional SNs in terms of hardware overhead and calculation errors in this paper. From the comparison, we can conclude that our idea can be used to shorten the necessary cycles for SC.
About the authors
Syoki Kawaminami received the B.E. degree in Information Science and Engineering from Ritsumei University in 2021. He is currently a graduate student of Graduate School of Information Science and Engeneering. Ritsumeikan University, Shiga, Japan. His research interests include how to use stochastic numbers for approximate computing.
Yukino Watanabe received the B.E. and the M.E. degrees in Information Science and Engineering from Ritsumeikan University in 2017 and 2019, respectively. She is currently with Procurement Planning Division, Department of Procurement Management, ATLA, Japan.
Shigeru Yamashita is a professor at the Department of Computer Science, College of Information Science and Engineering, Ritsumeikan University. He received his B.E., M.E. and Ph.D. degrees in Information Science from Kyoto University, Kyoto, Japan, in 1993, 1995 and 2001, respectively. His research interests include new types of computation and logic synthesis for them. He received the 2000 IEEE Circuits and Systems Society Transactions on Computer Aided Design of Integrated Circuits and Systems Best Paper Award, SASIMI 2010 Best Paper Award, 2010 IPSJ Yamashita SIG Research Award, and 2010 Marubun Academic Achievement Award of the Marubun Research Promotion Foundation. He is a senior member of IEEE, and a member of ACM and IPSJ.
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