MEISTER, W.. "Zum Entwurf dreistufiger minimaler Schaltnetze / On the minimization of three-level combinational circuits"
it - Information Technology, vol. 26, no. 1-6, 1984, pp. 119-130.
https://doi.org/10.1524/itit.1984.26.16.119
MEISTER, W. (1984). Zum Entwurf dreistufiger minimaler Schaltnetze / On the minimization of three-level combinational circuits.
it - Information Technology,
26(1-6), 119-130.
https://doi.org/10.1524/itit.1984.26.16.119
MEISTER, W. (1984) Zum Entwurf dreistufiger minimaler Schaltnetze / On the minimization of three-level combinational circuits. it - Information Technology, Vol. 26 (Issue 1-6), pp. 119-130.
https://doi.org/10.1524/itit.1984.26.16.119
MEISTER, W.. "Zum Entwurf dreistufiger minimaler Schaltnetze / On the minimization of three-level combinational circuits"
it - Information Technology 26, no. 1-6 (1984): 119-130.
https://doi.org/10.1524/itit.1984.26.16.119
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