Abstract
An algorithm is proposed for finding test vectors, which provide for elevated energy consumption of a combinational logic circuit that is synthesized on the basis of a design custom-designed VLSI CMOS.
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Original Russian Text © P.N. Bibilo, 2015, published in Avtomatika i Vychislitel’naya Tekhnika, 2015, No. 4, pp. 5–16.
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Bibilo, P.N. Construction of tests for providing elevated energy consumption for a combinatorial circuit of library elements. Aut. Control Comp. Sci. 49, 189–198 (2015). https://doi.org/10.3103/S0146411615040033
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DOI: https://doi.org/10.3103/S0146411615040033