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Secure processor architecture modeling for large-scale systems

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Abstract

This paper describes the architecture defects of existing hardware platforms have been analyzed. These defects allow software vulnerabilities exploitation. The authors propose to solve this problem by building a processor with secure-by-design architecture. Requirements for such a processor are formulated within this paper. Also the authors describe the application of virtualization technology to model the existing processor and to use this model to demonstrate proposed approach.

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Correspondence to D. Moskvin.

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Moskvin, D., Zegzhda, D. & Nikolskiy, A. Secure processor architecture modeling for large-scale systems. Aut. Control Comp. Sci. 49, 684–689 (2015). https://doi.org/10.3103/S0146411615080301

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  • DOI: https://doi.org/10.3103/S0146411615080301

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