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Title: A 3D Implementation of Convolutional Neural Network for Fast Inference

Conference ·

Low latency inference has many applications in edge machine learning. In this paper, we present a run-time configurable convolutional neural network (CNN) inference ASIC design for low-latency edge machine learning. By implementing a 5-stage pipelined CNN inference model in a 3D ASIC technology, we demonstrate that the model distributed on two dies utilizing face-to-face (F2F) 3D integration achieves superior performance. Our experimental results show that the design based on 3D integration achieves 43% better energy-delay product when compared to the traditional 2D technology.

Research Organization:
Oak Ridge National Laboratory (ORNL), Oak Ridge, TN (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC05-00OR22725
OSTI ID:
1997610
Resource Relation:
Conference: 2023 IEEE International Symposium on Circuits and Systems (ISCAS) - Monterey, California, United States of America - 5/21/2023 4:00:00 AM-5/25/2023 4:00:00 AM
Country of Publication:
United States
Language:
English