G. Beltrame
ABSTRACT
The market for embedded applications is facing a growing interest in power consumption issues: this work is intended to provide a new model to estimate software-level power consumption of 32-bit microprocessors. This model extends previous ones by considering dynamic inter-instruction effects that take place during code execution, providing a static means to characterize their energy consumption. The model is formally sound: it is conceived for a generic architecture and it has been preliminary validated on the Intel486™ architectur.
- 1.C.Brandolese,W.Fornaciari,F.Salice,and D.Sciuto.An instruction "level functionality "based energy estimation model for 32-bits microprocessors. In Proceedings of 37th IEEE D sign Automation Conferenc ,ages 346 -351,Los Angeles,CA,June 2000. Google Scholar
Digital Library
- 2.C.Brandolese,W.Fornaciari,F.Salice,and D.Sciuto.Source "level execution time estimation of c programs.In Proceedings of Int rnational Workshop Hardware Software Cod sign ,Copenhagen,Denmark, April 25-27 2001. Google ScholarDigital Library
- 3.J.Hennessy and D.A.Patterson.Computer Architectur -A Quantitative Approach .Morgan Kaufmann Publishers,San Mateo,II edition,1996. Google ScholarDigital Library
- 4.E.Macii,M.Pedram,and F.Somenzi.High-level ower modeling,estimation,and optimization.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ,17(11):1061 -1079,November 1998. Google ScholarDigital Library
- 5.Intel Architecture Software Developer 's Manual vol.1. Technical report,Intel Corporation,1997.Google Scholar
- 6.The SPARC Architecture Manual,version 8.Technical report,Sun Microsystems,1990.Google Scholar
- 7.microSPARC .-IIep user 's manual.Technical report, Sun Microsystems,1997.Google Scholar
- 8.A.Mood,F.Graybill,and D.Boes.Introduction to the theory of statistics .McGraw -Hill,New York,NY, 1988.Google Scholar
- 9.PEOPLE.(Power Estimation for Fast Exploration of Embedded Systems).Technical Report D3.3.1, ESPRIT-ESD project n.26769,1998.Google Scholar
- 10.S.Ramalingam and K.Schindler.Instruction level ower model and its application to general purpose processors.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ,pages 753 -756,1998.Google Scholar
- 11.J.Russell and M.Jacome.Software ower estimation and optimization for high erformance,32-bit embedded rocessors.In Proceedings of ICCD '98, International Confer nc on Computer Design ,pages 328 -333,Austin,TX,October 1998. Google ScholarDigital Library
- 12.V.Tiwari,S.Malik,and A.Wolfe.Power analysis of embedded software:a .rst step towards software ower minimization.IEEE Transactions on VLSI Systems ,2(4):437 -445,December 1994. Google ScholarDigital Library
- 13.V.Tiwari,S.Malik,and A.Wolfe.Power Analysis of the Intel 486DX2.Computer Engineering Technical Report No.CE-M94-5,Princeton University,June 1994.Google Scholar
Index Terms
- Dynamic modeling of inter-instruction effects for execution time estimation
Recommendations
An evaluation of speculative instruction execution on simultaneous multithreaded processors
Modern superscalar processors rely heavily on speculative execution for performance. For example, our measurements show that on a 6-issue superscalar, 93% of committed instructions for SPECINT95 are speculative. Without speculation, processor resources ...
Modeling the effects of instruction queue loading on a static instruction stream micro-architecture
MICRO 21: Proceedings of the 21st annual workshop on Microprogramming and microarchitectureIncreased processor performance requires the exploitation of the parallelism that exists within the instruction stream and within the processor itself: A static instruction stream micro-architecture, CONDEL, extracts and uses the machine instruction ...
Superscalar Instruction Execution in the 21164 Alpha Microprocessor
The 21164 is a new quad-issue superscalar Alpha microprocessor. This new high-performance chip can execute 1.2 billion instructions per second. The part became available in January of 1995 and delivered SPECint92/SPECfp92 performance of 335/500 (...
Comments