Article

Inter-reference gap distribution replacement: an improved replacement algorithm for set-associative caches

Authors:

Masamichi Takagi,

Kei HirakiAuthors Info & Claims

ICS '04: Proceedings of the 18th annual international conference on Supercomputing

Pages 20 - 30

https://doi.org/10.1145/1006209.1006213

Published: 26 June 2004 Publication History

Abstract

We propose a novel replacement algorithm, called Inter-Reference Gap Distribution Replacement (IGDR), for set-associative secondary caches of processors. IGDR attaches a weight to each memory-block, and on a replacement request it selects the memory-block with the smallest weight for eviction. The time difference between successive references of a memory-block is called its Inter-Reference Gap (IRG). IGDR estimates the ideal weight of a memory-block by using the reciprocal of its IRG.To estimate this reciprocal, it is assumed that each memory-block has its own probability distribution of IRGs; from which IGDR calculates the expected value of the reciprocal of the IRG to use as the weight of the memory-block. For implementation, IGDR does not have the probability distribution; instead it records the IRG distribution statistics at run-time. IGDR classifies memory-blocks and records statistics for each class. It is shown that the IRG distributions of memory-blocks correlate their reference counts, this enables classifying memory-blocks by their reference counts. IGDR is evaluated through an execution-driven simulation. For ten of the SPEC CPU2000 programs, IGDR achieves up to 46.1% (on average 19.8%) miss reduction and up to 48.9% (on average 12.9%) speedup, over the LRU algorithm.

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Cited By

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https://doi.org/10.1016/j.microrel.2024.115377
Wang YChang CSivasubramaniam ASoundararajan N(2023)ACIC: Admission-Controlled Instruction Cache2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071033(165-178)Online publication date: Feb-2023
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Choudhury AMondal BPaul KSikdar B(2023)Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictorMicroprocessors and Microsystems10.1016/j.micpro.2023.104864101(104864)Online publication date: Sep-2023
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Index Terms

Inter-reference gap distribution replacement: an improved replacement algorithm for set-associative caches
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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cover image ACM Conferences

ICS '04: Proceedings of the 18th annual international conference on Supercomputing

June 2004

360 pages

ISBN:1581138393

DOI:10.1145/1006209

General Chair:
Paul Feautrier
LIP, ENS Lyon
,
Program Chairs:
James Goodman
University of Auckland
,
André Seznec
IRISA, INRIA

Copyright © 2004 ACM.

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Published: 26 June 2004

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ICS04

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ICS04: International Conference on Supercomputing 2004

June 26 - July 1, 2004

Malo, France

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Overall Acceptance Rate 629 of 2,180 submissions, 29%

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https://doi.org/10.1016/j.microrel.2024.115377
Wang YChang CSivasubramaniam ASoundararajan N(2023)ACIC: Admission-Controlled Instruction Cache2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071033(165-178)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071033
Choudhury AMondal BPaul KSikdar B(2023)Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictorMicroprocessors and Microsystems10.1016/j.micpro.2023.104864101(104864)Online publication date: Sep-2023
https://doi.org/10.1016/j.micpro.2023.104864
Shah IJain ALin C(2022)Effective Mimicry of Belady’s MIN Policy2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA53966.2022.00048(558-572)Online publication date: Apr-2022
https://doi.org/10.1109/HPCA53966.2022.00048
Khan TZhang DSriraman ADevietti JPokam GLitz HKasikci BMartínez JDuato JJohn L(2021)RippleProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00063(734-747)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1109/ISCA52012.2021.00063
Sethumurugan SYin JSartori J(2021)Designing a Cost-Effective Cache Replacement Policy using Machine Learning2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA51647.2021.00033(291-303)Online publication date: Feb-2021
https://doi.org/10.1109/HPCA51647.2021.00033
Jain ALin C(2019)Cache Replacement PoliciesSynthesis Lectures on Computer Architecture10.2200/S00922ED1V01Y201905CAC04714:1(1-87)Online publication date: 17-Jun-2019
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Shi ZHuang XJain ALin C(2019)Applying Deep Learning to the Cache Replacement ProblemProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358319(413-425)Online publication date: 12-Oct-2019
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Beckmann NGibbons PHaeupler BMcGuffey CScheideler CBerenbrink P(2019)Writeback-Aware Caching (Brief Announcement)The 31st ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3323165.3323169(345-347)Online publication date: 17-Jun-2019
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Beckmann NSanchez D(2017)Maximizing Cache Performance Under Uncertainty2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2017.43(109-120)Online publication date: Feb-2017
https://doi.org/10.1109/HPCA.2017.43
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