skip to main content
article

Frequent value encoding for low power data buses

Published: 01 July 2004 Publication History

Abstract

Since the I/O pins of a CPU are a significant source of energy consumption, work has been done on developing encoding schemes for reducing switching activity on external buses. Modest reductions in switching can be achieved for data and address buses using a number of general purpose encoding schemes. However, by exploiting the characteristic of memory reference locality, switching activity on the address bus can be reduced by as much as 66%. Till now no characteristic has been identified that can be used to achieve similar reductions in switching activity on the data bus. We have discovered a characteristic of values transmitted over the data bus according to which a small number of distinct values, called frequent values, account for 32% of transmissions over the external data bus. Exploiting this characteristic we have developed an encoding scheme that we call the FV encoding scheme. To implement this scheme we have also developed a technique for dynamically identifying the frequent values which compares quite favorably with an optimal offline algorithm. Our experiments show that FV encoding of 32 frequent values yields an average reduction of 30% (with on-chip data cache) and 49% (without on-chip data cache) in data bus switching activity for SPEC95 and mediabench programs. Moreover the reduction in switching achieved by FV encoding is 2 to 4 times the reduction achieved by the bus-invert coding scheme and 1.5 to 3 times the reduction achieved by the adaptive method. The overall energy savings on data bus we attained considering the coder overhead is 29%.

References

[1]
Benini, L., DeMicheli, G., Macii, E., Sciuto, D., and Silvano, C. 1997. Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems. In Proceedings of the Great Lakes Symposium on VLSI. 77--82.
[2]
Benini, L., Macii, A., Macii, E., Poncino, M., and Scarsi, R. 1999. Synthesis of low-overhead interfaces for power-efficient communication over wide buses. In Proceedings of the Design Automation Conference. ACM, New York, 128--133.
[3]
Cadence Corporation. http://www.cadence.com.
[4]
Chang, N., Kim, K., and Cho, J. 2000. Bus encoding for low-power high-performance memory systems. In Proceedings of the Design Automation Conference. ACM, New York, 800--805.
[5]
Cheng, W.-C. and Pedram, M. 2000. Power-optimal encoding for DRAM address bus. In Proceedings of the International Symposium on Low Power Electronics Design. ACM/IEEE, New York, 250--252.
[6]
Komatsu, S., Ikeda, M., and Asada, K. 2000. Bus data encoding with adaptive code-book method for low power IP based design. In Proceedings of the International Workshop on IP based design and Synthesis.
[7]
Kretzschmar, C., Siegmund, R., and Mueller, D. 2001. Auto-optimizing bus encoding for reduced power dissipation in dynamically reconfigurable hardware. In Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms.
[8]
Kentron Technologies. Quad band memory (QBM): matching the fastest systems processors by doubling DDR memory bandwidth. http://www.kentrontech.com/PDF_Files/Presentations/.
[9]
Ramprasad, S., Shanbhag, N. R., and Hajj, I. N. 1999. A coding framework for low-power address and data busses. IEEE Transactions on VLSI Systems 7, 2 (June), 212--221.
[10]
The Mosis Service. http://www.mosis.com.
[11]
Musoll, E., Lang, T., and Cortadella, J. 1997. Exploiting locality of memory references to reduce the address bus energy. In Proceedings of the International Symposium on Low Power Electronics Design. ACM/IEEE, New York, 202--207.
[12]
Stan, M. R. and Burleson, W. P. 1995a. Coding a terminated bus for low power. In Proceedings of the Great Lakes Symposium on VLSI. 70--73.
[13]
Stan, M. R. and Burleson, W. P. 1995b. Bus-invert coding for low power I/O. IEEE Transactions on VLSI Systems 3, 1 (March), 49--58.
[14]
Su, C.-L., Tsui, C.-Y., and Despain, A. M. 1994. Saving power in the control path of embedded processors. In Proceedings of the Design and Test of Computers. IEEE, Computer Society Press, Los Alamitos, Calif., 24--30.
[15]
Yang, J. and Gupta, R. 2002. Frequent value locality and its applications. ACM Trans. Embed. Comput. Syst. 1, 1 (Nov.), 79--105.
[16]
Zhang, Y., Yang, J., and Gupta, R. 2000. Frequent value locality and value-centric data cache design. In Proceedings of the Ninth International Conference on Architectural Support for Programming Languages and Operating Systems. ACM, New York, 150--159.

Cited By

View all
  • (2024)Conditional spatial transition reduction data encoding technique for VLSI interconnectse-Prime - Advances in Electrical Engineering, Electronics and Energy10.1016/j.prime.2023.1004077(100407)Online publication date: Mar-2024
  • (2023)Low power and compact architecture of sector transition reduction encoding techniquee-Prime - Advances in Electrical Engineering, Electronics and Energy10.1016/j.prime.2023.1002976(100297)Online publication date: Dec-2023
  • (2023)Exploiting data encoding and reordering for low-power streaming in systolic arraysMicroprocessors and Microsystems10.1016/j.micpro.2023.104938102(104938)Online publication date: Oct-2023
  • Show More Cited By

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 9, Issue 3
July 2004
112 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/1013948
Issue’s Table of Contents

Publisher

Association for Computing Machinery

New York, NY, United States

Journal Family

Publication History

Published: 01 July 2004
Published in TODAES Volume 9, Issue 3

Permissions

Request permissions for this article.

Check for updates

Author Tags

  1. I/O pin capacitance
  2. Low power data buses
  3. encoding
  4. internal capacitance
  5. switching

Qualifiers

  • Article

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)10
  • Downloads (Last 6 weeks)0
Reflects downloads up to 03 Mar 2025

Other Metrics

Citations

Cited By

View all
  • (2024)Conditional spatial transition reduction data encoding technique for VLSI interconnectse-Prime - Advances in Electrical Engineering, Electronics and Energy10.1016/j.prime.2023.1004077(100407)Online publication date: Mar-2024
  • (2023)Low power and compact architecture of sector transition reduction encoding techniquee-Prime - Advances in Electrical Engineering, Electronics and Energy10.1016/j.prime.2023.1002976(100297)Online publication date: Dec-2023
  • (2023)Exploiting data encoding and reordering for low-power streaming in systolic arraysMicroprocessors and Microsystems10.1016/j.micpro.2023.104938102(104938)Online publication date: Oct-2023
  • (2021)Understanding Cache CompressionACM Transactions on Architecture and Code Optimization10.1145/345720718:3(1-27)Online publication date: 8-Jun-2021
  • (2021)Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient ApplicationsIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2021.308162368:8(3337-3350)Online publication date: Aug-2021
  • (2021)GPU-oriented dynamic low-power data transmission methodThe Journal of Supercomputing10.1007/s11227-020-03515-477:7(6525-6539)Online publication date: 1-Jul-2021
  • (2020)AI for Computer Architecture: Principles, Practice, and ProspectsSynthesis Lectures on Computer Architecture10.2200/S01052ED1V01Y202009CAC05515:5(1-142)Online publication date: 6-Nov-2020
  • (2020)Commutative data reorderingProceedings of the ACM/IEEE 47th Annual International Symposium on Computer Architecture10.1109/ISCA45697.2020.00091(1076-1088)Online publication date: 30-May-2020
  • (2020)ReferencesMicroprocessor 210.1002/9781119788355.refs(145-153)Online publication date: 30-Oct-2020
  • (2019)An Improved Low-Power Coding for Serial Network-On-Chip LinksCircuits, Systems, and Signal Processing10.1007/s00034-019-01231-wOnline publication date: 13-Aug-2019
  • Show More Cited By

View Options

Login options

Full Access

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Figures

Tables

Media

Share

Share

Share this Publication link

Share on social media