Hans-Dieter Wohlmuth
ABSTRACT
We present a pseudo random bit sequence (PRBS) generator with a sequence length of 2^7-1. The circuit uses a 7 bit full rate shift register with a linear xor feedback and works up to data rates of 13Gb/s. The PRBS generator features a divide by 2 trigger divider, two 3 bit shifted outputs and an auto start logic. The circuit draws 137mA from a single 1.5V supply. The circuit is manufactured in 120nm bulk CMOS technology.
- M. Green, A. Momtaz, K. Vakilian, X. Wang, K C. Jen, D. Chung, J. Cao, M. Caresosa, A. Hairapetian, I. Fujimori, and Y. Cai. OC-192 Transmitter in Standard 0.18um CMOS. In IEEE International Solid-State Circuits Conference, pages 248--249. IEEE, 2002.Google Scholar
- HongMo Wang. A 50 GHz VCO in 0.25um CMOS. In IEEE International Solid-State Circuits Conference, pages 372--373. IEEE, 2001.Google Scholar
- D. Kehrer, H.D Wohlmuth, H Knapp, M Wurzer, and A.L Scholtz. 40-Gb/s 2:1 Multiplexer and 1:2 Demultiplexer in 120 nm Standard CMOS. Journal of Solid State Circuits, 38(11):1830--1837, Nov. 2003.Google ScholarCross Ref
- H. Knapp, H. Wohlmuth, M. Wurzer, and M. Rest. 25 GHz Static Frequency Divider and 25 Gb/s Multiplexer in 0.12um CMOS. In IEEE International Solid-State Circuits Conference, pages 302--303. IEEE, 2002.Google Scholar
- H. Knapp, M. Wurzer, J. Bock, T. F. Meister, G. Ritzberger, and K. Aufinger. 40 Gbit/s 2^7-1 PRBS Generator IC in SiGe Bipolar Technology. In Proc. of Bipolar/BiCMOS Circuits and Technology Meeting, pages 124--127, Monterey, CA, USA, September 2002. IEEE.Google ScholarCross Ref
- T. Schiml et al. A 0.13um CMOS Platform with Cu/ Low-k Interconnects for System On Chip Applications. In VLSI Digest of Technical Papers, pages 101--102. IEEE, 2001.Google Scholar
- H. Wohlmuth, D Kehrer, M Tiebout, H Knapp, M Wurzer, and W Simburger. High Speed CMOS Circuits up to 40Gb/s and 50GHz. In GaAs IC, San Diego, USA, Nov. 2003. IEEE. invited paper.Google Scholar
Index Terms
- A low power 13-Gb/s 2^7-1 pseudo random bit sequence generator IC in 120 nm bulk CMOS
Recommendations
A 2-1, 20-Gb/s, Low-Power, Charge-Steering Half-Rate PRBS Generator in 1.2 V, 65 nm CMOS
AbstractIn this work, we propose a 2-1, 20-Gb/s, low-power, charge-steering, half-rate pseudorandom bit sequence (PRBS) generator in 1.2 V, 65 nm CMOS. At the target data rate, the proposed charge-steering implementation has the lowest power consumption ...
Sub 1-V highly-linear low-power class-AB bulk-driven tunable CMOS transconductor
This paper describes the design and realization of a sub 1-V low power class-AB bulk-driven tunable linear transconductor using a 0.18-μm CMOS technology. The proposed transconductor employs a class-AB bulk-driven differential input voltage follower and ...
Low-power CMOS injection-locked and current-mode logic frequency dividers in a 50 GHz LC cross-coupled oscillator
This paper aims to design a low-power and high-frequency divider in an integrated CMOS phase-locked loop. The proposed frequency divider is a two-step divider composed of an injection-locked frequency divider (ILFD) and a current-mode logic (CML) ...
Comments