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Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only)

Published: 20 February 2005 Publication History

Abstract

Just-in-time (JIT) compilation has been used in many applications to enable standard software binaries to execute on different underlying processor architectures, yielding software portability benefits. We previously introduced the concept of a standard hardware binary to achieve similar portability benefits for hardware, using a JIT compiler to compile the hardware binary to an FPGA. Our JIT compiler includes lean versions of technology mapping, placement, and routing algorithms that implement the standard hardware binary on a simple custom FPGA fabric designed specifically for JIT compilation. While directly implementing a custom FPGA fabric on silicon may be feasible for some applications, we investigated the option of implementing the simple FPGA fabric as a circuit mapped to a physical FPGA - a virtual FPGA. We described our simple fabric in structural VHDL, synthesized the fabric onto a Xilinx Spartan-IIE FPGA, and mapped 18 benchmark circuits onto the resulting virtual FPGA. Our results show a 6X decrease in performance and a 100X increase in hardware resource usage for the virtual FPGA approach compared to mapping the circuits directly to the physical FPGA. For applications in which hardware portability is essential, a designer could leverage the large capacity of current commercially available FPGAs to implement a virtual FPGA with tens of thousands of configurable gates, providing about the same amount of configurable logic as FPGAs produced in the mid 1990s. Nevertheless, the large overheads clearly indicate the need to develop a virtual FPGA approach tuned to physical fabrics in order to reduce the overhead.

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  • (2023)Reconfigurable Virtual Memory for FPGA-Driven I/OProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3582016.3582048(556-571)Online publication date: 25-Mar-2023
  • (2020)A Survey on Coarse-Grained Reconfigurable Architectures From a Performance PerspectiveIEEE Access10.1109/ACCESS.2020.30120848(146719-146743)Online publication date: 2020
  • (2019)A Novel SLM-Based Virtual FPGA Overlay Architecture2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)10.1109/MCSoC.2019.00018(74-80)Online publication date: Oct-2019
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  1. Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only)

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    cover image ACM Conferences
    FPGA '05: Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
    February 2005
    288 pages
    ISBN:1595930299
    DOI:10.1145/1046192
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    New York, NY, United States

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    Published: 20 February 2005

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    Cited By

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    • (2023)Reconfigurable Virtual Memory for FPGA-Driven I/OProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3582016.3582048(556-571)Online publication date: 25-Mar-2023
    • (2020)A Survey on Coarse-Grained Reconfigurable Architectures From a Performance PerspectiveIEEE Access10.1109/ACCESS.2020.30120848(146719-146743)Online publication date: 2020
    • (2019)A Novel SLM-Based Virtual FPGA Overlay Architecture2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)10.1109/MCSoC.2019.00018(74-80)Online publication date: Oct-2019
    • (2018)Sharing, protection, and compatibility for reconfigurable fabric with AmorphosProceedings of the 13th USENIX conference on Operating Systems Design and Implementation10.5555/3291168.3291177(107-127)Online publication date: 8-Oct-2018
    • (2018)A Survey on FPGA Virtualization2018 28th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2018.00031(131-1317)Online publication date: Aug-2018
    • (2017)Parameter Sensitivity in Virtual FPGA ArchitecturesApplied Reconfigurable Computing10.1007/978-3-319-56258-2_13(141-153)Online publication date: 31-Mar-2017
    • (2016)Demo: Overlay architectures for heterogeneous FPGA cluster management2016 Conference on Design and Architectures for Signal and Image Processing (DASIP)10.1109/DASIP.2016.7853832(239-240)Online publication date: Oct-2016
    • (2016)An architecture and design tool flow for embedding a virtual FPGA into a reconfigurable system-on-chipComputers and Electrical Engineering10.1016/j.compeleceng.2016.04.00555:C(112-122)Online publication date: 1-Oct-2016
    • (2016)FPGA OverlaysFPGAs for Software Programmers10.1007/978-3-319-26408-0_16(285-305)Online publication date: 18-Jun-2016
    • (2016)The LEAP FPGA Operating SystemFPGAs for Software Programmers10.1007/978-3-319-26408-0_14(245-258)Online publication date: 18-Jun-2016
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