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Analysis of iSLIP scheduling algorithm for input-queuing switches

Published: 17 June 2004 Publication History

Abstract

The paper presents one of the most up-to-date iSLIP (iterative round robin matching with slip) algorithms for configuration and scheduling input-queuing switch fabrics. The aim of the paper is research the performance of the algorithm regarding cell delay in the queues depending on the load for input-queuing switches with 4, 8, 16 and 32 ports. The advantage of the algorithm is achieving almost 100% throughput as result of de-synchronization of output arbiters playing important role in providing low latency.

References

[1]
Iversen, V., "Teletraffic engineering", TU Denmark, 1999.
[2]
McKeown, N. "Achieving 100% throughput in an input-queued switch". IEEE INFOCOM '96, San Francisco.
[3]
McKeown, N. "The tiny tera: A small high-bandwidth packet switch core", IEEE Micro, vol. 17, pp. 26--33, 1997.
[4]
Mekkittikul, A., N. McKeown, "A practical scheduling algorithm for achieving 100% throughput in input-queuing switches", INFOCOM'98, San Francisco.
[5]
Mekkittikul, A., "A Starvation-free algorithm for achieving 100% troughput in an input-queued switch", IEEE ICCCN, 1996.

Cited By

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  • (2021)Macro and Micro Architectures for Network on ChipDesign Methodologies and Tools for 5G Network Development and Application10.4018/978-1-7998-4610-9.ch003(44-74)Online publication date: 2021
  • (2019)Modified X–Y routing for mesh topology based NoC router on field programmable gate arrayIET Circuits, Devices & Systems10.1049/iet-cds.2018.5356Online publication date: 7-Jan-2019
  • (2006)An immune clonal selection scheduling algorithm for input-queued switchesProceedings of the 6th international conference on Simulated Evolution And Learning10.1007/11903697_99(790-797)Online publication date: 15-Oct-2006

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cover image ACM Other conferences
CompSysTech '04: Proceedings of the 5th international conference on Computer systems and technologies
June 2004
661 pages
ISBN:9549641384
DOI:10.1145/1050330
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 17 June 2004

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Author Tags

  1. FIFO
  2. HOL effect
  3. cell delay
  4. iSLIP algorithm
  5. throughput

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Overall Acceptance Rate 241 of 492 submissions, 49%

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Cited By

View all
  • (2021)Macro and Micro Architectures for Network on ChipDesign Methodologies and Tools for 5G Network Development and Application10.4018/978-1-7998-4610-9.ch003(44-74)Online publication date: 2021
  • (2019)Modified X–Y routing for mesh topology based NoC router on field programmable gate arrayIET Circuits, Devices & Systems10.1049/iet-cds.2018.5356Online publication date: 7-Jan-2019
  • (2006)An immune clonal selection scheduling algorithm for input-queued switchesProceedings of the 6th international conference on Simulated Evolution And Learning10.1007/11903697_99(790-797)Online publication date: 15-Oct-2006

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