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Memory predecryption: hiding the latency overhead of memory encryption

Published: 01 March 2005 Publication History

Abstract

Memory encryption has become a common approach to providing a secure processing environment, but current schemes suffer from extra performance and storage overheads. This paper presents predecryption as a method of providing this security with less overhead by using well-known prefetching techniques to retrieve data from memory and perform decryption before it is needed by the processor. Our results, tested mostly on SPEC 2000 benchmarks, show that using our predecryption scheme can actually result in no increase in execution time despite an extra 128 cycle decryption latency per memory block access.

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Published In

cover image ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News  Volume 33, Issue 1
Special issue: Workshop on architectural support for security and anti-virus (WASSA)
March 2005
159 pages
ISSN:0163-5964
DOI:10.1145/1055626
Issue’s Table of Contents

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 March 2005
Published in SIGARCH Volume 33, Issue 1

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  • (2016)Data privacy in non-volatile cache: Challenges, attack models and solutions2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2016.7428036(348-353)Online publication date: Jan-2016
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