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Two dimensional reordering of functional test data for compression by ATE

Published:17 April 2005Publication History

ABSTRACT

This paper presents a novel approach for compressing functional test data in Automatic Test Equipment (ATE). A practical technique is presented for 2 Dimensional (2D) reordering of test data in which additionally to test vector reordering, column reordering is also applied. An ATE based approach to extract the original test vectors from the 2D ordered data is presented. The advantage of the approach is substantiated using the figure of merit of entropy for the 2D ordered test data of ISCAS benchmark circuits.

References

  1. Y. Zorian, "Test Requirements for Embedded Core-Based Systems and IEEE P1500," Proc. Intl. Test Conf., pp. 191--199, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. I. Pomeranz, L. Reddy and S. M. Reddy, "Compactest: A Method to Generate Compact Test Sets for Combinational Circuits," Proc. of Intl. Test Conf., pp. 194--203, 1991. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. J.-S. Chang and C.-S. Lin, "Test Set Compaction for Combinational Circuits," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, pp. 1370--1378, Nov. 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. I. Hamzaoglu and J. H. Patel, "Test Set Compaction Algorithms for Combinational Circuits," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No. 8, pp. 957--963, Aug. 2000. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. A. El-Maleh, S. Al-Zahir and E. Kahn, "A Geometric Primitive Based Compression Scheme for Testing System-on-a-Chip," Proc. IEEE VLSI Test Symp., pp. 54--59, 2001. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. T. Yamaguchi, M. Ishida and D. S. Ha, "An Efficient Method for Compressing Test Data," Proc. IEEE Intl. Test Conf., pp. 79--88, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. A. Jas and N. A. Touba, "Test Vector Decompression via Cyclical Scan Chains and Its Application to Testing Core-Based Designs," Proc. IEEE Intl. Test Conf., pp. 458--464, 1998. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. A. Chandra and K. Chakrabarty, "System-on-a-chip test-data compression and decompression architectures based on Golomb codes," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol. 20, No. 3, pp. 355--368, March 2001. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. P. T. Gonciari, B. M. Al-Hashimi and N. Nicolici "Variable-Length Input Huffman Coding for System-on-a-Chip Test," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol. 22, No. 6, pp. 783--796, June 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. A. Jas, J. G. Dastidar, N. M. Eng and N. A. Touba, "An efficient test vector compression scheme using selective Huffman coding," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, Vol. 22, No. 6, pp. 797--806, June 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. F. Karimi, Z. Navabi, W. M. Meleis and F. Lombardi, "Using Data Compression in Automatic Test Equipment for System-on-Chip Testing," IEEE Trans. on Instrumentation and Measurement, Vol. 53, No. 2, pp. 308--317, April 2004.Google ScholarGoogle ScholarCross RefCross Ref
  12. H. Hashempour and F. Lombardi, "ATE-Amenable Test Data Compression With no Cyclic Scan Registers," Proc. IEEE Intl. Conf. On Defect and Fault Tolerance in VLSI Systems, pp. 151--158, 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. T. Alton, "TGEN: Flexible Timing Generator Architecture," Proc. IEEE Intl. Test Conf., pp. 439--443, 1992. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. M. L. Bushnell and V. D. Agrawal, "Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits," Kluwer Academic Pub., 2000.Google ScholarGoogle Scholar
  15. K. Helsgaun, "An Effective Implementation of the Lin-Kernighan Traveling Salesman Heuristic," European Journal of Operational Research 126 (1), 106--130 (2000).Google ScholarGoogle ScholarCross RefCross Ref

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  1. Two dimensional reordering of functional test data for compression by ATE

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    • Published in

      cover image ACM Conferences
      GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSI
      April 2005
      518 pages
      ISBN:1595930574
      DOI:10.1145/1057661
      • General Chair:
      • John Lach,
      • Program Chairs:
      • Gang Qu,
      • Yehea Ismail

      Copyright © 2005 ACM

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 17 April 2005

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