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Joint exploration of architectural and physical design spaces with thermal consideration

Published: 08 August 2005 Publication History

Abstract

Heat is a main concern for processors in deep sub-micron technologies. The chip temperature is affected by both the power consumption of processor components and the chip layout. Therefore, for thermal-aware design it is crucial to consider the thermal effects of different floorplans during micro-architectural design space exploration. In this paper, we propose a thermal-aware architectural floorplanning framework. With the aid of this framework, an architect can explore both physical and architectural design spaces simultaneously to find an architecture and the corresponding chip layout that maximizes performance under a thermal limitation

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    cover image ACM Conferences
    ISLPED '05: Proceedings of the 2005 international symposium on Low power electronics and design
    August 2005
    400 pages
    ISBN:1595931376
    DOI:10.1145/1077603
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 08 August 2005

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    Author Tags

    1. architectural floorplanning
    2. performance
    3. thermal

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    View all
    • (2024)Predicting Accurate Hot Spots in a More Than Ten-Thousand-Core GPU with a Million-Time Speedup over FEM Enabled by a Physics-based Learning Algorithm2024 23rd IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)10.1109/ITherm55375.2024.10709489(1-8)Online publication date: 28-May-2024
    • (2023)PODTherm-GP: A Physics-Based Data-Driven Approach for Effective Architecture-Level Thermal Simulation of Multi-Core CPUsIEEE Transactions on Computers10.1109/TC.2023.327853572:10(2951-2962)Online publication date: Oct-2023
    • (2021)Incentive-Based Scheduling for Green Computational GridRole of IoT in Green Energy Systems10.4018/978-1-7998-6709-8.ch012(272-293)Online publication date: 2021
    • (2015)Design and development of hybrid integrated thermal aware job scheduling on computational grid environment2015 International Symposium on Mathematical Sciences and Computing Research (iSMSC)10.1109/ISMSC.2015.7594020(13-17)Online publication date: May-2015
    • (2015)Performance comparison of thermal aware job scheduling based on multi priorities on computational grid2015 Seventh International Conference on Ubiquitous and Future Networks10.1109/ICUFN.2015.7182578(419-423)Online publication date: Jul-2015
    • (2011)Overcoming Variations in Nanometer-Scale TechnologiesIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2011.21382501:1(5-18)Online publication date: Mar-2011
    • (2011)End-to-End Delay Minimization in Thermally Constrained Distributed SystemsProceedings of the 2011 23rd Euromicro Conference on Real-Time Systems10.1109/ECRTS.2011.16(81-91)Online publication date: 5-Jul-2011
    • (2010)Characterizing processor thermal behaviorProceedings of the fifteenth International Conference on Architectural support for programming languages and operating systems10.1145/1736020.1736043(193-204)Online publication date: 13-Mar-2010
    • (2010)Characterizing processor thermal behaviorACM SIGPLAN Notices10.1145/1735971.173604345:3(193-204)Online publication date: 13-Mar-2010
    • (2010)Characterizing processor thermal behaviorACM SIGARCH Computer Architecture News10.1145/1735970.173604338:1(193-204)Online publication date: 13-Mar-2010
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