Cited By
View all- Meroni ARana VSantambrogio MSciuto D(2008)A Requirements-Driven Reconfigurable SoC Communication Infrastructure Design Flow4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008)10.1109/DELTA.2008.127(405-409)Online publication date: Jan-2008
- Lien CChen YShih C(2007)On-chip bus architecture optimization for multi-core SoC systemsProceedings of the 5th IFIP WG 10.2 international conference on Software technologies for embedded and ubiquitous systems10.5555/1778978.1779013(301-310)Online publication date: 7-May-2007
- Pandey SGlesner MSentovich E(2006)Statistical on-chip communication bus synthesis and voltage scaling under timing yield constraintProceedings of the 43rd annual Design Automation Conference10.1145/1146909.1147078(663-668)Online publication date: 24-Jul-2006