Article

Hardware/software partitioning of software binaries: a case study of H.264 decode

Authors:

Gordon McGregor,

Brian EinlothAuthors Info & Claims

CODES+ISSS '05: Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

Pages 285 - 290

https://doi.org/10.1145/1084834.1084905

Published: 19 September 2005 Publication History

Abstract

We describe results of a case study whose intent was to determine whether new techniques for hardware/software partitioning of an application's binary are competitive with partitioning at the C source code level. While such competitiveness has been shown previously for standard benchmark suites involving smaller or unoptimized applications, the case study instead focuses on a complete 16,000-line highly-optimized commercial-grade application, namely an H.264 video decoder. The several month study revealed that binary partitioning was indeed competitive, achieving nearly identical 2.5x speedups as source level partitioning, compared to a standard microprocessor. Furthermore, the study revealed that several simple C-level coding modifications, including pass by value-return, function specialization, algorithmic specialization, hardware-targeted reimplementation, global array elimination, hoisting and sinking of error code, and conversion to explicit control flow, could lead to improved application speedups approaching 7x for both source level and binary level partitioning.

References

[1]

C. Scott Ananian. SiliconC: A Hardware Backend for SUIF. http://flex-compiler.lcs.mit.edu/SiliconC.

[2]

W. Böhm, J. Hammes, B. Draper, M. Chawathe, C. Ross, R. Rinker, and W. Najjar. Mapping a Single Assignment Programming Language to Reconfigurable Systems. The Journal of Supercomputing, vol. 21, pp. 117-130, 2002.

Digital Library

[3]

D. Burger and T.M. Austin. The SimpleScalar Tool Set, Version 2.0. University of Wisconsin-Madison Computer Sciences Department Technical Report #1342. June, 1997.

[4]

CatapultC. http://www.mentor.com/products/c-based_design/

[5]

C. Cifuentes, M. Van Emmerik, D.Ung, D. Simon, T. Waddington. Preliminary Experiences with the Use of the UQBT Binary Translation Framework. Proceedings of the Workshop on Binary Translation, Newport Beach, USA, October 1999.

[6]

CriticalBlue. <http://www.criticalblue.com>.

[7]

P. Eles, Z. Peng, K. Kuchchinski and A. Doboli. System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search. Kluwer's Design Automation for Embedded Systems, vol2, no 1, pp. 5-32, Jan 1997.

Digital Library

[8]

A. Fin, F. Fummi, M. Signoretto. SystemC: A Homogenous Environment to Test Embedded Systems. CODES 2001.

Digital Library

[9]

Freescale Semiconductor. http://www.freescale.com/.

[10]

J. Henkel. A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems. Proceedings of the 36th ACM/IEEE conference on Design automation conference, pp. 122-127, June 1999.

Digital Library

[11]

G. Mittal, D. Zaretsky, X. Tang and P. Banerjee. Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs. IEEE Symposium on Field-Programmable Custom Computing Machines. April 2004.

Digital Library

[12]

OXFORD Hardware Compilation Group, The Handel language, Technical Report, Oxford University 1997.

[13]

G. Stitt, R. Lysecky, F. Vahid. Dynamic Hardware/Software Partitioning: A First Approach. IEEE/ACM 40th Design Automation Conference (DAC), June 2003.

Digital Library

[14]

G. Stitt and F. Vahid. A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms. Design and Test Europe Conference (DATE), 2005.

Digital Library

[15]

G. Stitt and F. Vahid. Hardware/Software Partitioning of Software Binaries. IEEE/ACM International Conference on Computer Aided Design, November 2002.

Digital Library

[16]

XPRES Compiler. http://www.tensilica.com/html/xpres.html.

Cited By

Nileshwar VLysecky RBrunvard EStevens KCavallaro JZhang T(2012)SNR analysis approach for hardware/software partitioning using dynamically adaptable fixed point representationProceedings of the great lakes symposium on VLSI10.1145/2206781.2206790(27-32)Online publication date: 3-May-2012
https://dl.acm.org/doi/10.1145/2206781.2206790
Wilder MRinker R(2012)Improving Security Assurance of Embedded Systems through Systemic Dissolution of Architected ResourcesProceedings of the 2012 45th Hawaii International Conference on System Sciences10.1109/HICSS.2012.318(5384-5392)Online publication date: 4-Jan-2012
https://dl.acm.org/doi/10.1109/HICSS.2012.318
Stitt GVahid F(2011)Thread WarpingACM Transactions on Design Automation of Electronic Systems10.1145/1970353.197036516:3(1-21)Online publication date: 1-Jun-2011
https://dl.acm.org/doi/10.1145/1970353.1970365
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Published In

cover image ACM Conferences

CODES+ISSS '05: Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

September 2005

356 pages

ISBN:1595931619

DOI:10.1145/1084834

General Chairs:
Petru Eles
Linköping University, Sweden
,
Axel Jantsch
Royal Institute of Technology, Sweden
,
Program Chair:
Reinaldo Bergamaschi
IBM T. J. Watson Research Center

Copyright © 2005 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 19 September 2005

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CODES/ISSS05

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CODES/ISSS05: Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis

September 19 - 21, 2005

NJ, Jersey City, USA

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CODES+ISSS '05 Paper Acceptance Rate 50 of 200 submissions, 25%;

Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

Nileshwar VLysecky RBrunvard EStevens KCavallaro JZhang T(2012)SNR analysis approach for hardware/software partitioning using dynamically adaptable fixed point representationProceedings of the great lakes symposium on VLSI10.1145/2206781.2206790(27-32)Online publication date: 3-May-2012
https://dl.acm.org/doi/10.1145/2206781.2206790
Wilder MRinker R(2012)Improving Security Assurance of Embedded Systems through Systemic Dissolution of Architected ResourcesProceedings of the 2012 45th Hawaii International Conference on System Sciences10.1109/HICSS.2012.318(5384-5392)Online publication date: 4-Jan-2012
https://dl.acm.org/doi/10.1109/HICSS.2012.318
Stitt GVahid F(2011)Thread WarpingACM Transactions on Design Automation of Electronic Systems10.1145/1970353.197036516:3(1-21)Online publication date: 1-Jun-2011
https://dl.acm.org/doi/10.1145/1970353.1970365
Schneider Beck Fl. ACarro LSchneider Beck Fl. ACarro L(2010)Dynamic Detection and ReconfigurationDynamic Reconfigurable Architectures and Transparent Optimization Techniques10.1007/978-90-481-3913-2_5(119-130)Online publication date: 16-Feb-2010
https://doi.org/10.1007/978-90-481-3913-2_5
Mu JLysecky R(2009)Autonomous hardware/software partitioning and voltage/frequency scaling for low-power embedded systemsACM Transactions on Design Automation of Electronic Systems10.1145/1640457.164045915:1(1-20)Online publication date: 28-Dec-2009
https://dl.acm.org/doi/10.1145/1640457.1640459
Gligor MFournel NPétrot FColas-Bigey FFouilliart ATeninge PCoppola M(2009)Practical design space exploration of an h264 decoder for handheld devices using a virtual platformProceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation10.1007/978-3-642-11802-9_25(206-215)Online publication date: 9-Sep-2009
https://dl.acm.org/doi/10.1007/978-3-642-11802-9_25
Lysecky R(2008)Scalability and parallel execution of warp processingInternational Journal of Parallel Programming10.5555/1515858.151586136:5(478-492)Online publication date: 1-Oct-2008
https://dl.acm.org/doi/10.5555/1515858.1515861
Saldanha LLysecky RGebotys CMartin G(2008)Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuitsProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450148(49-54)Online publication date: 19-Oct-2008
https://dl.acm.org/doi/10.1145/1450135.1450148
Stitt GNarayanan VYan ZMacii EBhanja S(2008)Hardware/software partitioning with multi-version implementation explorationProceedings of the 18th ACM Great Lakes symposium on VLSI10.1145/1366110.1366146(143-146)Online publication date: 4-May-2008
https://dl.acm.org/doi/10.1145/1366110.1366146
Sirowy SStitt GVahid FHutton MChow P(2008)C is for circuitsProceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays10.1145/1344671.1344689(117-126)Online publication date: 24-Feb-2008
https://dl.acm.org/doi/10.1145/1344671.1344689
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