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A generic lookup cache architecture for network processing applications

Published: 22 February 2006 Publication History

Abstract

In this paper, we introduce a novel architecture for constructing caches for lookup operations that are used in a variety of network processing applications. The distinguishing feature of the cache is the ability to match on keys that of arbitrary lengths. We show through an FPGA implementation, that the proposed design can speed up lookup operations significantly compared to a software implementation. In conjunction with a network processor, the use of such a cache can greatly improve the response time of lookup intensive applications such as DNS resolution, directory lookup in network storage, and LDAP queries.

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  • (2010)TURBONFSProceedings of the 20th symposium on Great lakes symposium on VLSI10.1145/1785481.1785541(251-256)Online publication date: 16-May-2010

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  1. A generic lookup cache architecture for network processing applications

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    cover image ACM Conferences
    FPGA '06: Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
    February 2006
    248 pages
    ISBN:1595932925
    DOI:10.1145/1117201
    • General Chair:
    • Steve Wilton,
    • Program Chair:
    • André DeHon
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    New York, NY, United States

    Publication History

    Published: 22 February 2006

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    • (2010)TURBONFSProceedings of the 20th symposium on Great lakes symposium on VLSI10.1145/1785481.1785541(251-256)Online publication date: 16-May-2010

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