Article

IBM's 50 Million gate ASICs

Authors:

David E. Lackey,

George DoerreAuthors Info & Claims

ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference

Pages 628 - 634

https://doi.org/10.1145/1119772.1119915

Published: 21 January 2003 Publication History

Abstract

There is no slowdown in the complexity increase for ASIC and SoC designs. As we write this paper in August, 2002, 40M gate ASICs are nearing tape-out, and 50M gate designs are likely to start before this conference takes place. This paper describes the current tool and methodology development efforts focused on enabling ASIC and SoC designs of these sizes and complexity, centered around the reduction of design turn-around-time, improvement of the quality of results and the modeling and optimization of deep sub-micron electrical effects.

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Cited By

Chrysos NMinkenberg CRudquist MBasso CVanderpool B(2015)SCOC: High-radix switches made of bufferless clos networks2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2015.7056050(402-414)Online publication date: Feb-2015
https://doi.org/10.1109/HPCA.2015.7056050
Darringer JLevitan S(2007)Multi-core design automation challengesProceedings of the 44th annual Design Automation Conference10.1145/1278480.1278670(760-764)Online publication date: 4-Jun-2007
https://dl.acm.org/doi/10.1145/1278480.1278670
Nakamura YTagata MOkamoto TTawada SYoshikawa KSentovich E(2006)Budgeting-free hierarchical design method for large scale and high-performance LSIsProceedings of the 43rd annual Design Automation Conference10.1145/1146909.1147151(955-958)Online publication date: 24-Jul-2006
https://dl.acm.org/doi/10.1145/1146909.1147151
Show More Cited By

IBM's 50 Million gate ASICs
1. Hardware
  1. Electronic design automation

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Published In

cover image ACM Conferences

ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference

January 2003

865 pages

ISBN:0780376609

DOI:10.1145/1119772

General Chair:
Hiroto Yasuura

Copyright © 2003 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

IPSJ: Information Processing Society of Japan
IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE: Institute of Electronics, Information and Communication Engineers

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 21 January 2003

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Cited By

Chrysos NMinkenberg CRudquist MBasso CVanderpool B(2015)SCOC: High-radix switches made of bufferless clos networks2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2015.7056050(402-414)Online publication date: Feb-2015
https://doi.org/10.1109/HPCA.2015.7056050
Darringer JLevitan S(2007)Multi-core design automation challengesProceedings of the 44th annual Design Automation Conference10.1145/1278480.1278670(760-764)Online publication date: 4-Jun-2007
https://dl.acm.org/doi/10.1145/1278480.1278670
Nakamura YTagata MOkamoto TTawada SYoshikawa KSentovich E(2006)Budgeting-free hierarchical design method for large scale and high-performance LSIsProceedings of the 43rd annual Design Automation Conference10.1145/1146909.1147151(955-958)Online publication date: 24-Jul-2006
https://dl.acm.org/doi/10.1145/1146909.1147151
Stamenkovic Z(2006)System-on-Chip Design: Engineering or Art2006 25th International Conference on Microelectronics10.1109/ICMEL.2006.1650978(372-379)Online publication date: 2006
https://doi.org/10.1109/ICMEL.2006.1650978
Lackey DZuchowski PKoehl JGetreu IFix LLavagno L(2003)Designing mega-ASICs in nanogate technologiesProceedings of the 40th annual Design Automation Conference10.1145/775832.776029(770-775)Online publication date: 2-Jun-2003
https://dl.acm.org/doi/10.1145/775832.776029

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