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On combining iteration space tiling with data space tiling for scratch-pad memory systems

Published: 18 January 2005 Publication History

Abstract

Most previous studies on tiling concentrate on iteration space only for cache-based memory systems. However, more and more real-time embedded systems are adopting Scratch-Pad Memories (SPMs) which emphasize on the management of data flow through data-oriented tiling. In this paper, we analyze the relationships between iteration space I and data space D, proposing a preliminary classification based on subscript functions. An important real-life application, matrix multiply, is selected to illustrate how we combine the mismatched iteration space tiling with data space tiling for optimal solutions.

References

[1]
TMS320C54x DSP Functional Overview. Texas Instruments Inc., http://focus.ti.com/lit/ug/spru307a/spru307a.pdf.
[2]
ADSP-21xx Processor. Analog Devices Inc., http://www.analog.com/processors/processors/ADSP/.
[3]
R. Andonov, H. Bourzoufi, and S. Rajopadhye. Two-dimensional orthogonal tiling: from theory to practice. In Proc. HPC '96, pages 225--231.
[4]
A. Badawy, A. Aggarwal, D. Yeung, and C. Tseng. Evaluating the impact of memory system performance on software prefetching and locality optimizations. In Proc. Supercomputing '01, pages 481--500.
[5]
F. C. et al. Custom Memory Management Methodologyl Exploration of Memory Organization for Embedded Multimedia System Design. Kluwer Academic Publishers, 1998.
[6]
M. K. et al. A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. IEEE Trans. on CAD, 23(2):243--260, Feb. 2004.
[7]
R. Leupers, A. Basu, and P. Marwedel. Optimized array index computation in dsp programs. In Proc. ASP-DAC '98.
[8]
N. L. Passos and E. H.-M. Sha. Achieving full parallelism using multi-dimensional retiming. IEEE Trans. Parallel and Distributed Systems, 7(11):1150--1163, Nov. 1996.
[9]
J. Ramanujam and P. Sadayappan. Tiling multidimensional iteration spaces for nonshared memory machines. In Proc. Supercomputing '91, pages 111--120.
[10]
Q. Wang, E. H.-M. Sha, and N. L. Passos. Optimal data scheduling for uniform multi-dimensional applications. IEEE Trans. Computers, 45(12):1439--1444, Dec. 1996.
[11]
M. Wolfe. High Performance Compilers for Parallel Computing. Addison Wesley Publishing Company, 1996.
[12]
J. Xue. Loop tiling for parallelism. Kluwer Academic Publishers, 2000.

Cited By

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  • (2010)Improving scratchpad allocation with demand-driven data tilingProceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems10.1145/1878921.1878942(127-136)Online publication date: 24-Oct-2010
  • (2010)Virtual I/O Based on ScratchPad Memory for Embedded SystemProceedings of the 2010 10th IEEE International Conference on Computer and Information Technology10.1109/CIT.2010.388(2250-2254)Online publication date: 29-Jun-2010
  • (2009)SPMTMProceedings of the 8th International Symposium on Advanced Parallel Processing Technologies10.1007/978-3-642-03644-6_6(67-81)Online publication date: 21-Aug-2009
  • Show More Cited By

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cover image ACM Conferences
ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference
January 2005
1495 pages
ISBN:0780387376
DOI:10.1145/1120725
  • General Chair:
  • Ting-Ao Tang
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 18 January 2005

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

View all
  • (2010)Improving scratchpad allocation with demand-driven data tilingProceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems10.1145/1878921.1878942(127-136)Online publication date: 24-Oct-2010
  • (2010)Virtual I/O Based on ScratchPad Memory for Embedded SystemProceedings of the 2010 10th IEEE International Conference on Computer and Information Technology10.1109/CIT.2010.388(2250-2254)Online publication date: 29-Jun-2010
  • (2009)SPMTMProceedings of the 8th International Symposium on Advanced Parallel Processing Technologies10.1007/978-3-642-03644-6_6(67-81)Online publication date: 21-Aug-2009
  • (2007)Towards data tiling for whole programs in scratchpad memory allocationProceedings of the 12th Asia-Pacific conference on Advances in Computer Systems Architecture10.5555/2392163.2392171(63-74)Online publication date: 23-Aug-2007
  • (2007)Towards Data Tiling for Whole Programs in Scratchpad Memory AllocationAdvances in Computer Systems Architecture10.1007/978-3-540-74309-5_8(63-74)Online publication date: 2007

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