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Towards automatic parameter extraction for surface-potential-based MOSFET models with the genetic algorithm

Published: 18 January 2005 Publication History

Abstract

In this paper, we present an automatic parameter extraction method with the GA (Genetic Algorithm) for surface-potential-based MOSFET models such as HiSIM (Hiroshima-university STARC IGFET Model). The method employs a two-stage extraction procedure operating on different sets of model parameters. Experimental results demonstrate that extraction of 34 parameters can be completed within 23 hours with PC (AthlonXP 2500), although this would typically take a human expert several days.

References

[1]
Y. Cheng and C. Hu, MOSFET modeling & BSIM3 user's guide, Kluwer Academic Publishers, 1999.
[2]
M. Miura-Mattausch, U. Feldmann, A. Rahm, M. Bollu, and D. Savignac, "Unified complete MOSFET model for analysis of digital and analog circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 15, pp. 1--7, 1996.
[3]
M. Miura-Mattausch, H. Ueno, M. Tanaka, H. J. Mattausch, S. Kumashiro, T. Yamaguchi, K. Yamashita, and N. Nakayama, "HiSIM: A MOSFET model for circuit simulation connecting circuit performance with technology," in Technical Digest of International Electron Devices Meeting, 2002, pp. 109--112.
[4]
Semiconductor Technology Academic Research Center (STARC), "HiSIM 1.1.1 user's manual," http://www.starc.or.jp/index.html, 2002.
[5]
J. H. Holland, Adaptation in Natural and Artificial Systems, The University of Michigan Press, 1975.
[6]
D. E. Goldberg, Genetic Algorithms in Search, Optimization, and Machine Learning, Addison Wesley, 1989.
[7]
W. H. Press, S. A. Teukolsky, W. T. Vetterling, and B. P. Flannery, Numerical Recipes in C, p. 542, Cambridge University Press, 1988.
[8]
J. Watts, C. Bittner, D. Heaberlin, and J. Hoffmann, "Extraction of compact model parameters for ULSI MOSFETs using a genetic algorithm," in Proceedings of the Second International Conference on Modeling and Simulation of Microsystems (MSM99), 1999, pp. 176--179.

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  • (2022)An Automatic Parameter Extraction Method Based on Autoencoder for PIN Diode Model2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)10.1109/ICSICT55466.2022.9963331(1-3)Online publication date: 25-Oct-2022
  • (2016)A genetic programming approach to modeling power losses of Insulate Gate Bipolar Transistors2016 IEEE Congress on Evolutionary Computation (CEC)10.1109/CEC.2016.7744391(4705-4712)Online publication date: Jul-2016
  • (2013)A high speed FPGA parameter extractor for an efficient analytical model of the submicron MOS transistorCAS 2013 (International Semiconductor Conference)10.1109/SMICND.2013.6688672(259-262)Online publication date: Oct-2013
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  1. Towards automatic parameter extraction for surface-potential-based MOSFET models with the genetic algorithm

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    cover image ACM Conferences
    ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference
    January 2005
    1495 pages
    ISBN:0780387376
    DOI:10.1145/1120725
    • General Chair:
    • Ting-Ao Tang
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 18 January 2005

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    View all
    • (2022)An Automatic Parameter Extraction Method Based on Autoencoder for PIN Diode Model2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)10.1109/ICSICT55466.2022.9963331(1-3)Online publication date: 25-Oct-2022
    • (2016)A genetic programming approach to modeling power losses of Insulate Gate Bipolar Transistors2016 IEEE Congress on Evolutionary Computation (CEC)10.1109/CEC.2016.7744391(4705-4712)Online publication date: Jul-2016
    • (2013)A high speed FPGA parameter extractor for an efficient analytical model of the submicron MOS transistorCAS 2013 (International Semiconductor Conference)10.1109/SMICND.2013.6688672(259-262)Online publication date: Oct-2013
    • (2011)A Proposal of Genetic Operations for BSIM Parameter Extraction Using Real-Coded Genetic AlgorithmJournal of Advanced Computational Intelligence and Intelligent Informatics10.20965/jaciii.2011.p113115:8(1131-1138)Online publication date: 20-Oct-2011
    • (2008)An effective parameter extraction method based on memetic differential evolution algorithmMicroelectronics Journal10.1016/j.mejo.2008.02.02139:12(1761-1769)Online publication date: Dec-2008

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