skip to main content
10.1145/1120725.1120807acmconferencesArticle/Chapter ViewAbstractPublication PagesaspdacConference Proceedingsconference-collections
Article

An efficient combinationality check technique for the synthesis of cyclic combinational circuits

Published: 18 January 2005 Publication History

Abstract

It has been recently pointed out that cyclic circuits are not necessarily sequential, and cyclic topologies that are combinational generally have lower literal counts than their acyclic counterparts. However, the synthesis of cyclic combinational circuits is potentially expensive due to the need to explore a wide range of cyclic topologies and check each of them for combinationality. We first obtain the acyclic implementation of the given set of boolean functions. Then using a branch-and-bound heuristic, we generate cyclic circuits that are to be checked for combinationality. Unlike earlier complex methods for combinationality check, our approach is to check whether this cyclic circuit is functionally equivalent to the acyclic circuit obtained earlier. While synthesizing cyclic circuits with the proposed method, we observed up to 45%. improvements in the literal count (for Espresso and LGsynth93 benchmarks) over the acyclic circuit synthesized by the Berkeley sis package.

References

[1]
S. Malik, "Analysis of cyclic combinational circuits," IEEE Trans. Computer-Aided Design, vol. 13, no. 7, pp. 950--956, 1994.
[2]
M. Riedel and J. Bruck, "The synthesis of cyclic combinational circuits," in Proc. Design Automation Conf., 2003, pp. 163--168.
[3]
T. R. Shiple, V. Singhal, R. K. Brayton, and A. L. Sangiovanni-Vincentelli, "Analysis of combinational cycles in sequential circuits," in IEEE Intl' Symp. Circuits and Systems (ISCAS), 1996, pp. 592--595.
[4]
T. R. Shiple, G. Berry, and H. Touati, "Constructive analysis of cyclic circuits," in Proc. European Design and Test Conf., 1996.
[5]
T. R. Shiple, "Formal analysis of synchronous circuits," Ph.D. dissertation, UC Berkeley, 1996.
[6]
F. Bourdoncle, "Efficient chaotic iteration strategies with widening," in Proc. Intl' Conf. Formal Methods in Prog. Appl., 1993.
[7]
M. Riedel and J. Bruck, "Cyclic combinational circuits: Analysis for synthesis," in Proc. Intl Workshop Logic Synth., 2003.
[8]
"Berkeley sis 1.3 distribution." {Online}. Available: http://www-cad.eecs.berkeley.edu/~pchong/sis.html
[9]
R. K. Brayton, "Benchmarks from logic minimization algorithms for vlsi synthesis." {Online}. Available: ftp://ic.eecs.berkeley.edu
[10]
"Benchmarks from the int'l workshop on logic synth." {Online}. Available: http://www.cbl.ncsu.edu

Cited By

View all
  • (2022)Equivalence Checking for Flow-Based Computing2022 IEEE 40th International Conference on Computer Design (ICCD)10.1109/ICCD56317.2022.00101(656-663)Online publication date: Oct-2022
  • (2018)SRCLockProceedings of the 2018 Great Lakes Symposium on VLSI10.1145/3194554.3194596(153-158)Online publication date: 30-May-2018

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference
January 2005
1495 pages
ISBN:0780387376
DOI:10.1145/1120725
  • General Chair:
  • Ting-Ao Tang
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 18 January 2005

Permissions

Request permissions for this article.

Check for updates

Qualifiers

  • Article

Conference

ASPDAC05
Sponsor:

Acceptance Rates

Overall Acceptance Rate 466 of 1,454 submissions, 32%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)3
  • Downloads (Last 6 weeks)0
Reflects downloads up to 05 Mar 2025

Other Metrics

Citations

Cited By

View all
  • (2022)Equivalence Checking for Flow-Based Computing2022 IEEE 40th International Conference on Computer Design (ICCD)10.1109/ICCD56317.2022.00101(656-663)Online publication date: Oct-2022
  • (2018)SRCLockProceedings of the 2018 Great Lakes Symposium on VLSI10.1145/3194554.3194596(153-158)Online publication date: 30-May-2018

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Figures

Tables

Media

Share

Share

Share this Publication link

Share on social media