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STACCATO: disjoint support decompositions from BDDs through symbolic kernels

Published: 18 January 2005 Publication History

Abstract

A disjoint support decomposition (DSD) is a representation of a Boolean function F obtained by composing two or more simpler component functions such that the component functions have no common inputs. The decomposition of a function is desirable for several reasons. First, it's a method to obtain a multiple-level implementation of a function. It leads to a partition in simpler blocks that easily results in smaller areas and fewer interconnects. Moreover, it exposes a parallelism in the computation of the function that can be exploited by hardware as well as during simulation.In this paper we present a novel algorithm, STACCATO, that generates a DSD decomposition starting from the BDD of a function. STACCATO is novel because 1) it provides a complete description of each decomposition, that is, it computes the "kernel" function K relating the elements of each decomposition, and 2) it has better performance than previously known algorithms. Experimental results run on both IWLS and industrial test-benches show that STACCATO's performance is in most cases three times as fast or more than previously known solutions.

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  • (2022)The Power of Disjoint Support Decompositions in Decision DiagramsNASA Formal Methods10.1007/978-3-031-06773-0_42(790-799)Online publication date: 24-May-2022
  • (2015)New Logic Synthesis as Nanotechnology EnablerProceedings of the IEEE10.1109/JPROC.2015.2460377103:11(2168-2195)Online publication date: Nov-2015
  • (2015)Bottom-up disjoint-support decomposition based on cofactor and boolean difference analysisProceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2015.7357181(680-687)Online publication date: 18-Oct-2015
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cover image ACM Conferences
ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference
January 2005
1495 pages
ISBN:0780387376
DOI:10.1145/1120725
  • General Chair:
  • Ting-Ao Tang
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 18 January 2005

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Cited By

View all
  • (2022)The Power of Disjoint Support Decompositions in Decision DiagramsNASA Formal Methods10.1007/978-3-031-06773-0_42(790-799)Online publication date: 24-May-2022
  • (2015)New Logic Synthesis as Nanotechnology EnablerProceedings of the IEEE10.1109/JPROC.2015.2460377103:11(2168-2195)Online publication date: Nov-2015
  • (2015)Bottom-up disjoint-support decomposition based on cofactor and boolean difference analysisProceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2015.7357181(680-687)Online publication date: 18-Oct-2015
  • (2013)BDS-MAJProceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488792(1-6)Online publication date: 29-May-2013
  • (2009)Smart Enumeration: A Systematic Approach to Exhaustive SearchIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation10.1007/978-3-540-95948-9_43(429-438)Online publication date: 2009
  • (2007)Improving Bounds for FPGA Logic Minimization2007 International Conference on Field-Programmable Technology10.1109/FPT.2007.4439257(245-248)Online publication date: Dec-2007
  • (2006)Compacting Intermediate StatesScalable Hardware Verification with Symbolic Simulation10.1007/0-387-29906-8_4(51-80)Online publication date: 2006

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