Article

Leakage control in FPGA routing fabric

Authors:

Suresh Srinivasan,

A. Gayasen,

N. Vijaykrishnan,

T. TuanAuthors Info & Claims

ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference

Pages 661 - 664

https://doi.org/10.1145/1120725.1120987

Published: 18 January 2005 Publication History

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Abstract

As FPGA designs in 65nm are being explored, reducing leakage power becomes an important design issue. A significant portion of the FPGA leakage is expended in the unused multiplexers used in the interconnect fabric. This work focuses on reducing the leakage of these unused multiplexers by controlling their inputs. We investigate the design issues involved in implementing such a technique and also show experimental results demonstrating the effectiveness of our approach.

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Cited By

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Singh A(2017)Power Efficient Data-Aware SRAM Cell for SRAM-Based FPGA ArchitectureField - Programmable Gate Array10.5772/67257Online publication date: 31-May-2017
https://doi.org/10.5772/67257
Huda SAnderson J(2017)Leveraging Unused Resources for Energy Optimization of FPGA InterconnectIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.269140925:8(2307-2320)Online publication date: 1-Aug-2017
https://dl.acm.org/doi/10.1109/TVLSI.2017.2691409
Wei SZheng JPotkonjak MHutchings BBetz V(2013)Low power FPGA design using post-silicon device aging (abstract only)Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays10.1145/2435264.2435340(277-277)Online publication date: 11-Feb-2013
https://dl.acm.org/doi/10.1145/2435264.2435340
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Leakage control in FPGA routing fabric
1. Hardware
  1. Very large scale integration design

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Published In

ASP-DAC '05: Proceedings of the 2005 Asia and South Pacific Design Automation Conference

January 2005

1495 pages

ISBN:0780387376

DOI:10.1145/1120725

General Chair:
Ting-Ao Tang
Fudan University, Shanghai, P. R. China

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 18 January 2005

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ASPDAC05: Asia and South Pacific Design Automation Conference

January 18 - 21, 2005

Shanghai, China

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

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Singh A(2017)Power Efficient Data-Aware SRAM Cell for SRAM-Based FPGA ArchitectureField - Programmable Gate Array10.5772/67257Online publication date: 31-May-2017
https://doi.org/10.5772/67257
Huda SAnderson J(2017)Leveraging Unused Resources for Energy Optimization of FPGA InterconnectIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.269140925:8(2307-2320)Online publication date: 1-Aug-2017
https://dl.acm.org/doi/10.1109/TVLSI.2017.2691409
Wei SZheng JPotkonjak MHutchings BBetz V(2013)Low power FPGA design using post-silicon device aging (abstract only)Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays10.1145/2435264.2435340(277-277)Online publication date: 11-Feb-2013
https://dl.acm.org/doi/10.1145/2435264.2435340
Monson JWirthlin MHutchings B(2012)A fault injection analysis of Linux operating on an FPGA-embedded platformInternational Journal of Reconfigurable Computing10.1155/2012/8504872012(7-7)Online publication date: 1-Jan-2012
https://dl.acm.org/doi/10.1155/2012/850487
Han SSirigiri VSaab DTabib-Azar MHu A(2012)Ultra-low power NEMS FPGAProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429499(533-538)Online publication date: 5-Nov-2012
https://dl.acm.org/doi/10.1145/2429384.2429499
Chen CParsa RPatil NChong SAkarvardar KProvine JLewis DWatt JHowe RWong HMitra SCheung PWawrzynek J(2010)Efficient FPGAs using nanoelectromechanical relaysProceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1723112.1723158(273-282)Online publication date: 21-Feb-2010
https://dl.acm.org/doi/10.1145/1723112.1723158
Leming GNepal K(2009)Low-power FPGA routing switches using adaptive body biasing technique2009 52nd IEEE International Midwest Symposium on Circuits and Systems10.1109/MWSCAS.2009.5236058(447-450)Online publication date: Aug-2009
https://doi.org/10.1109/MWSCAS.2009.5236058
Hasan MKureshi AArslan T(2009)Leakage reduction in FPGA routing multiplexers2009 IEEE International Symposium on Circuits and Systems10.1109/ISCAS.2009.5117959(1129-1132)Online publication date: May-2009
https://doi.org/10.1109/ISCAS.2009.5117959
Nair PKoppa SJohn EKudithipudi D(2009)Topology selection of FPGA look-up tables for low-leakage operation2009 European Conference on Circuit Theory and Design10.1109/ECCTD.2009.5274987(73-76)Online publication date: Aug-2009
https://doi.org/10.1109/ECCTD.2009.5274987
Cheng LLin YHe LHutton MChow P(2008)Trace-based framework for concurrent development of process and FPGA architecture considering process variation and reliabilityProceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays10.1145/1344671.1344696(159-168)Online publication date: 24-Feb-2008
https://dl.acm.org/doi/10.1145/1344671.1344696
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Performance analysis of FPGA interconnect fabric for ultra-low power applications

Combining low-leakage techniques for FPGA routing design

A low-power field-programmable gate array routing fabric

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