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Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series

Published: 30 April 2006 Publication History

Abstract

Analysis of nonlinearity in inductively source degenerated (ISD) CMOS LNA's Using Volterra series is presented. The effects of cascode transistor, parasitic capacitances in cascode node and output load are considered in this paper. In comparison to other works, this work completely follows the HSPICE simulation results. Second order nonlinearity analysis; which is more important in low IF and zero IF receivers, is done for the first time in ISD CMOS LNA in this paper. Simple relations are obtained for IIP2 and IIP3 of the circuit which can be helpful for the RF designers and have great agreement with HSPICE simulation results. For verifying the relations, a LNA is designed and simulated with HSPICE using a 0.35 μm CMOS technology for a prototype GSM receiver. The HSPICE simulation results show 19.7 dB voltage gain, 6.5 dBm IIP3 and 23.8 dBm IIP2, while the analytical relations predict 19.4 dB voltage gain, 7.6 dBm IIP3 and 25.3 dBm IIP2.

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  • (2007)Nonlinearity analysis in CMOS triode transconductor at low and high frequency2007 IEEE Northeast Workshop on Circuits and Systems10.1109/NEWCAS.2007.4487997(992-995)Online publication date: Aug-2007

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    cover image ACM Conferences
    GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI
    April 2006
    450 pages
    ISBN:1595933476
    DOI:10.1145/1127908
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    Published: 30 April 2006

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    Author Tags

    1. CMOS LNA
    2. cascode
    3. distortion
    4. inductively source degenerated (ISD)
    5. intermodulation (IM)
    6. linearity
    7. second order interception point (IIP2)
    8. third order interception point (IIP3)
    9. volterra kernels
    10. volterra series

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    • (2007)Nonlinearity analysis in CMOS triode transconductor at low and high frequency2007 IEEE Northeast Workshop on Circuits and Systems10.1109/NEWCAS.2007.4487997(992-995)Online publication date: Aug-2007

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