Article

Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series

Authors:

A. Fotowat-Ahmadi,

P. Jabedar-MaralaniAuthors Info & Claims

GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI

Pages 135 - 139

https://doi.org/10.1145/1127908.1127942

Published: 30 April 2006 Publication History

Abstract

Analysis of nonlinearity in inductively source degenerated (ISD) CMOS LNA's Using Volterra series is presented. The effects of cascode transistor, parasitic capacitances in cascode node and output load are considered in this paper. In comparison to other works, this work completely follows the HSPICE simulation results. Second order nonlinearity analysis; which is more important in low IF and zero IF receivers, is done for the first time in ISD CMOS LNA in this paper. Simple relations are obtained for IIP2 and IIP3 of the circuit which can be helpful for the RF designers and have great agreement with HSPICE simulation results. For verifying the relations, a LNA is designed and simulated with HSPICE using a 0.35 μm CMOS technology for a prototype GSM receiver. The HSPICE simulation results show 19.7 dB voltage gain, 6.5 dBm IIP₃ and 23.8 dBm IIP₂, while the analytical relations predict 19.4 dB voltage gain, 7.6 dBm IIP₃ and 25.3 dBm IIP₂.

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Cited By

Ghazzaghi HRezaei Rad GAbrishmifar A(2007)Nonlinearity analysis in CMOS triode transconductor at low and high frequency2007 IEEE Northeast Workshop on Circuits and Systems10.1109/NEWCAS.2007.4487997(992-995)Online publication date: Aug-2007
https://doi.org/10.1109/NEWCAS.2007.4487997

Index Terms

Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series
1. Theory of computation

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Published In

cover image ACM Conferences

GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI

April 2006

450 pages

ISBN:1595933476

DOI:10.1145/1127908

General Chairs:
Gang Qu
University of Maryland, College Park
,
Yehea Ismail
Northwestern University
,
Program Chairs:
Vijaykrishnan Narayanan
Pennsylvania State University
,
Hai Zhou
Northwestern University

Copyright © 2006 ACM.

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Published: 30 April 2006

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April 30 - May 1, 2006

PA, Philadelphia, USA

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Cited By

Ghazzaghi HRezaei Rad GAbrishmifar A(2007)Nonlinearity analysis in CMOS triode transconductor at low and high frequency2007 IEEE Northeast Workshop on Circuits and Systems10.1109/NEWCAS.2007.4487997(992-995)Online publication date: Aug-2007
https://doi.org/10.1109/NEWCAS.2007.4487997

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