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On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips

Published: 30 April 2006 Publication History

Abstract

This paper proposes a new on-chip 3.3V-to-1.8V voltage down converter, which employs a new reference voltage generator (RVG) and a PMOS pass device with forward-biased source-to-bulk circuit. By the use of the forward-biased source-to-bulk technique, the circuit achieves approximately an 18% output current improvement over its nonforward-biased state. The proposed VDC has characteristic such as output voltage (Vout) is stabilized within ±6mV over a large load current range (0-100mA) and within ±0.16% for ±10% variation of supply voltage. The temperature dependency of Vout is only 0.53mV/0 C with temperature ranging from 0 to 100 0 C.

References

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  1. On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips

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    cover image ACM Conferences
    GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI
    April 2006
    450 pages
    ISBN:1595933476
    DOI:10.1145/1127908
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 30 April 2006

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    Author Tags

    1. 3.3V-to-1.8V
    2. DC-to-DC
    3. forward-biased source-to-bulk technique
    4. voltage down converter

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    April 30 - May 1, 2006
    PA, Philadelphia, USA

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