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A digit serial algorithm for the integer power operation

Published:30 April 2006Publication History

ABSTRACT

We introduce a right-to-left digit serial algorithm for the integer power operation xy where x and y are positive integers. For n-bit words the algorithm utilizes o(n) additions and does not require use of a multiplier. We describe a hardware implementation and evaluate the effectiveness employing a Synopsys tool set with a standard cell implementation. Out digit serial algorithm compares favorably with a popular iterative square and multiply algorithm implemented with the same tool set.

References

  1. A. Fit-Florea, D.W. Matula, "A Digit-Serial Algorithm for the Discrete Logarithm Modulo 2k ", Proc. ASAP, IEEE, 2004, pp. 236--246. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. A. Fit-Florea, D.W. Matula, M.A. Thornton, "Additive Bit-serial Algorithm for the Discrete Logarithm Modulo 2k ", IEE Electronics Letters Jan. 2005, Vol. 41, No. 2, pp: 57--59.Google ScholarGoogle Scholar
  3. Benschop N.F., "Multiplier for the multiplication of at least two figures in an original format" US Patent Nr. 5,923,888, July 13, 1999.Google ScholarGoogle Scholar
  4. Szabo, N.S., Tanaka, R.I., "Residue arithmetic and its applications to computer technology", McGraw-Hill Book Company, 1967.Google ScholarGoogle Scholar
  5. Synopsys Design/physical Compiler Student Guide. 2003.Google ScholarGoogle Scholar
  6. A. Fit-Florea, D.W. Matula, M.A. Thornton, "Addition-Based Exponentiation Modulo 2k ", IEE Electronics Letters, Jan. 2005, Vol. 41, No. 2, pp: 56--57.Google ScholarGoogle Scholar
  7. J.E. Stine, J. Grad, I. Castellanos, J. Blank, V. Dave, M. Prakash, N. Illiev, N. Jachimiec: A Framework for High-Level Synthesis of System-on-Chip Designs, Proceedings. 2005 IEEE International Conference on Microelectronic Systems Education, 2005. 12-13 June 2005, pages 67--68. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. D.W. Matula, A. Fit-Florea, M.A. Thornton, "Table Loopup Structures for Multiplicative Inverses Modulo 2k", 17th Symp. Comp.Arith., June 27-29, 2005, pp. 130--135. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. T. Cormen, C. Leiserson, R. Rivest, C. Stein, "Introduction to Algorithms", 2nd edition, The MIT Press, 2001, pp. 879--880. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. B. Parhami, "Computer Arithmetic Algorithms and Hardware Designs", Oxford University Press, 2000, pp. 383--384. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. D. Knuth, "The Art of Computer Programming: Seminumerical Algorithms" Addison Wesley, Vol. 2, 2nd Edition, 1981, pp: 441--466. Google ScholarGoogle ScholarDigital LibraryDigital Library

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          cover image ACM Conferences
          GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI
          April 2006
          450 pages
          ISBN:1595933476
          DOI:10.1145/1127908

          Copyright © 2006 ACM

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          Publication History

          • Published: 30 April 2006

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