Article

Software synthesis from the dataflow interchange format

Authors:

Shuvra S. BhattacharyyaAuthors Info & Claims

SCOPES '05: Proceedings of the 2005 workshop on Software and compilers for embedded systems

Pages 37 - 49

https://doi.org/10.1145/1140389.1140394

Published: 29 September 2005 Publication History

Abstract

Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingly popular in the domain of digital signal processing (DSP). The dataflow inter-change format (DIF) [11] and the associated DIF package have been developed for specifying, working with, and transferring dataflow-based DSP designs across tools. In this paper, we present the newly developed DIF-to-C software synthesis framework for automatically generating monolithic C-code implementations from DSP system specifications that are programmed in DIF. This framework allows designers to efficiently explore the complex range of implementation tradeoffs that are available through various dataflow-based techniques for scheduling and memory management. Furthermore, the DIF-to-C framework provides a standard, vendor-neutral mechanism for linking coarse grain data-flow optimizations with fine grain hand-optimized libraries and the large body of optimization techniques in the area of C compilers for DSP. Through experiments involving several DSP applications, we demonstrate the novel and useful capabilities of our DIF-to-C software synthesis framework.

References

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Cited By

Lee KLee YRaina ALiu YWu JDefrancisci CRiggan BBhattacharyya S(2021)Software synthesis from dataflow schedule graphsSN Applied Sciences10.1007/s42452-020-04135-63:2Online publication date: 16-Jan-2021
https://doi.org/10.1007/s42452-020-04135-6
Wu JBlattner TKeyrouz WBhattacharyya S(2018)A design tool for high performance image processing on multicore platforms2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2018.8342215(1304-1309)Online publication date: Mar-2018
https://doi.org/10.23919/DATE.2018.8342215
Bouakaz AFradet PGirault A(2017)A Survey of Parametric Dataflow Models of ComputationACM Transactions on Design Automation of Electronic Systems10.1145/299953922:2(1-25)Online publication date: 20-Jan-2017
https://dl.acm.org/doi/10.1145/2999539
Show More Cited By

Index Terms

Software synthesis from the dataflow interchange format
1. Software and its engineering
  1. Software creation and management
    1. Designing software
      1. Software implementation planning
        Software design techniques
    2. Software development process management
      1. Software development methods
  2. Software notations and tools
    1. General programming languages
      1. Language types
        Data flow languages

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Published In

cover image ACM Conferences

SCOPES '05: Proceedings of the 2005 workshop on Software and compilers for embedded systems

September 2005

132 pages

ISBN:1595932070

DOI:10.1145/1140389

Conference Chairs:
Krishna Kavi
University of North Texas
,
Ron Cytron
Washington University, St. Louis

Copyright © 2005 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAA: European Design Automation Association
ARTEST2
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
The National Science Foundation

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 29 September 2005

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Cited By

Lee KLee YRaina ALiu YWu JDefrancisci CRiggan BBhattacharyya S(2021)Software synthesis from dataflow schedule graphsSN Applied Sciences10.1007/s42452-020-04135-63:2Online publication date: 16-Jan-2021
https://doi.org/10.1007/s42452-020-04135-6
Wu JBlattner TKeyrouz WBhattacharyya S(2018)A design tool for high performance image processing on multicore platforms2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2018.8342215(1304-1309)Online publication date: Mar-2018
https://doi.org/10.23919/DATE.2018.8342215
Bouakaz AFradet PGirault A(2017)A Survey of Parametric Dataflow Models of ComputationACM Transactions on Design Automation of Electronic Systems10.1145/299953922:2(1-25)Online publication date: 20-Jan-2017
https://dl.acm.org/doi/10.1145/2999539
Zaki GPlishker WBhattacharyya SFruth F(2017)Implementation, Scheduling, and Adaptation of Partial Expansion Graphs on Multicore PlatformsJournal of Signal Processing Systems10.1007/s11265-016-1107-887:1(107-125)Online publication date: 1-Apr-2017
https://dl.acm.org/doi/10.1007/s11265-016-1107-8
Lin SLiu YPlishker WBhattacharyya S(2016)A Design Framework for Mapping Vectorized Synchronous Dataflow Graphs onto CPU-GPU PlatformsProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906374(20-29)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906374
Desnos KPelcat MNezan JAridhi S(2016)On Memory Reuse Between Inputs and Outputs of Dataflow ActorsACM Transactions on Embedded Computing Systems10.1145/287174415:2(1-25)Online publication date: 17-Feb-2016
https://dl.acm.org/doi/10.1145/2871744
Zhou ZPlishker WBhattacharyya SDesnos KPelcat MNezan J(2016)Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal ProcessingJournal of Signal Processing Systems10.1007/s11265-014-0956-283:3(309-328)Online publication date: 1-Jun-2016
https://dl.acm.org/doi/10.1007/s11265-014-0956-2
Desnos KPelcat MNezan JAridhi S(2015)Buffer merging technique for minimizing memory footprints of Synchronous Dataflow specifications2015 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)10.1109/ICASSP.2015.7178142(1111-1115)Online publication date: Apr-2015
https://doi.org/10.1109/ICASSP.2015.7178142
Zaki GPlishker WBhattacharyya SFruth F(2014)Partial expansion of dataflow graphs for resource-aware scheduling of multicore signal processing systems2014 48th Asilomar Conference on Signals, Systems and Computers10.1109/ACSSC.2014.7094469(385-392)Online publication date: Nov-2014
https://doi.org/10.1109/ACSSC.2014.7094469
Zhou ZDesnos KPelcat MNezan JPlishker WBhattacharyya S(2013)Scheduling of parallelized synchronous dataflow actors2013 International Symposium on System on Chip (SoC)10.1109/ISSoC.2013.6675271(1-10)Online publication date: Oct-2013
https://doi.org/10.1109/ISSoC.2013.6675271
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