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Combining compiler and operating system support for energy efficient I/O on embedded platforms

Published: 29 September 2005 Publication History

Abstract

Mobile and embedded platforms have experienced dramatic advances in capabilities, largely due to the development of associated peripheral devices for storage and communication. The incorporation of these I/O devices has increased the overall power envelope of these platforms. In fact, system-level power consumption of mobile platforms is often dominated by peripheral devices. Since battery technologies alone have been unable to provide the lifetimes required by many platforms, in order to conserve energy, most devices provide the ability to transition into low power states during idle periods. The resulting energy savings are heavily dependent upon the lengths and number of idle periods experienced by a device. This paper presents an infrastructure designed to take advantage of device low power states by increasing the burstiness of device accesses and idle periods to provide a reduced power profile, and thereby an improvement in battery life. Our approach combines compiler-based source modifications with operating system support to implement a dynamic solution for enhanced energy consumption. We evaluate our infrastructure on an XScale-based embedded platform with a Linux implementation.

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  • (2007)Accurate on-line prediction of processor and memoryenergy usage under voltage scalingProceedings of the 7th ACM & IEEE international conference on Embedded software10.1145/1289927.1289945(84-93)Online publication date: 30-Sep-2007
  • (2007)Finite state machine-based DRAM power management with early resynchronisationIET Computers & Digital Techniques10.1049/iet-cdt:200601131:4(434-442)Online publication date: 2-Jul-2007
  1. Combining compiler and operating system support for energy efficient I/O on embedded platforms

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      cover image ACM Conferences
      SCOPES '05: Proceedings of the 2005 workshop on Software and compilers for embedded systems
      September 2005
      132 pages
      ISBN:1595932070
      DOI:10.1145/1140389
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 29 September 2005

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      • (2007)Accurate on-line prediction of processor and memoryenergy usage under voltage scalingProceedings of the 7th ACM & IEEE international conference on Embedded software10.1145/1289927.1289945(84-93)Online publication date: 30-Sep-2007
      • (2007)Finite state machine-based DRAM power management with early resynchronisationIET Computers & Digital Techniques10.1049/iet-cdt:200601131:4(434-442)Online publication date: 2-Jul-2007

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