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A CMOS SoC for 56/18/16 CD/DVD-dual/RAM applications

Published: 24 July 2006 Publication History

Abstract

A SoC, integrating RF/AFE and 1.5 Gb/s SATA PHY, is presented. It supports 471 Mb/s bit-rate at 18xS DVD. A partial parity mode reduces SDRAM bandwidth. A power control mode minimizes system clock rate. The SoC has 10M transistors, occupies 5.4 x 5.1 mm2 in 0.18 mm CMOS process, and consumes 772 mW during 16xS DVD read.

Reference

[1]
J.-S. Pan, T.-H. Hsu, H.-C. Chen, J.-W. Chen, B.-Y. Hsieh et. al.; "Fully Integrated CMOS SoC for 56/18/16 CD/DVD-dual/RAM Applications with On-Chip 4-LVDS Channel WSG and 1.5Gb/s SATA PHY"; ISSCC'06, Feb. 2006

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  1. A CMOS SoC for 56/18/16 CD/DVD-dual/RAM applications

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    cover image ACM Conferences
    DAC '06: Proceedings of the 43rd annual Design Automation Conference
    July 2006
    1166 pages
    ISBN:1595933816
    DOI:10.1145/1146909
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    New York, NY, United States

    Publication History

    Published: 24 July 2006

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    Author Tags

    1. CMOS
    2. DVD-RAM
    3. SATA
    4. WSR
    5. optical storage

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    DAC06: The 43rd Annual Design Automation Conference 2006
    July 24 - 28, 2006
    CA, San Francisco, USA

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    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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