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Hierarchical power distribution and power management scheme for a single chip mobile processor

Published: 24 July 2006 Publication History

Abstract

A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method can achieve very low leakage current in the partial active mode of a single chip mobile processor. The single chip mobile processor embedded three CPU's that is baseband processor, application processor, and multi-media processor. In the "waiting for calling" mode of the mobile handsets, application processor and multi-media processor part can be power-off. This chip can power off these power domains although the some of baseband parts are actively operating. Many new techniques for multiple power domains in the chip are described.This paper describes the output of two projects. (1) Fundamental circuits research on hierarchical power domain = joint research by Hitachi, Ltd. and Renesas Technology Corp.[4] (2) LSI design for one chip mobile processor = joint development by NTT DoCoMo Inc. and Renesas Technology Corp.[5].

References

[1]
T. Kamei, et al., "A Resume-Standby Application Processor for 3G Cellular Phone," ISSCC Dig. Tech. Papers, pp. 336--337, Feb. 2004.
[2]
Y. Kanno, et al., "mI/O Architecture for 0.13-um Wide-Voltage-Range System-on-a-Package (SoP) Designs," Symp. on VLSI Circuit Dig. Tech. Papers, pp. 168--169, June 2002.
[3]
M. Yamaoka, et al., "Low-Power Embedded SRAM Modules with Expanded Margins for Writing," ISSCC Dig. Tech. Papers, pp. 480--481, Feb. 2005.
[4]
Y. Kanno, et al., "Hierarchical Power Distribution with 20 Power Domains in 90-nm Low-Power Multi-CPU Processor," ISSCC Dig. Tech. Papers, pp. 540--541, Feb. 2006.
[5]
T. Hattori, et al., "A Power Management Scheme Controlling 20 Power Domains for a Single-Chip Mobile Processor, ISSCC Dig. Tech. Papers, pp. 542--543, Feb. 2006.

Cited By

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  • (2016)Design & implementation of high speed low power scan flip-flop2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)10.1109/RTEICT.2016.7808191(2010-2014)Online publication date: May-2016
  • (2012)Hierarchical power network synthesis for multiple power domain designsThirteenth International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2012.6187536(477-482)Online publication date: Mar-2012
  • (2011)A Fast Reactivation Scheme in Power Gating DesignApplied Mechanics and Materials10.4028/www.scientific.net/AMM.135-136.1134135-136(1134-1139)Online publication date: Oct-2011
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      cover image ACM Conferences
      DAC '06: Proceedings of the 43rd annual Design Automation Conference
      July 2006
      1166 pages
      ISBN:1595933816
      DOI:10.1145/1146909
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 24 July 2006

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      Author Tags

      1. VLSI
      2. mobile processor
      3. partial power off
      4. power domain

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      July 24 - 28, 2006
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      • (2016)Design & implementation of high speed low power scan flip-flop2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)10.1109/RTEICT.2016.7808191(2010-2014)Online publication date: May-2016
      • (2012)Hierarchical power network synthesis for multiple power domain designsThirteenth International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2012.6187536(477-482)Online publication date: Mar-2012
      • (2011)A Fast Reactivation Scheme in Power Gating DesignApplied Mechanics and Materials10.4028/www.scientific.net/AMM.135-136.1134135-136(1134-1139)Online publication date: Oct-2011
      • (2009)Multi-core for mobile phonesProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874924(1260-1265)Online publication date: 20-Apr-2009
      • (2009)Design and Implementation of Fine-Grain Power Gating with Ground Bounce SuppressionProceedings of the 2009 22nd International Conference on VLSI Design10.1109/VLSI.Design.2009.63(381-386)Online publication date: 5-Jan-2009
      • (2007)Overview on Low Power SoC Design Technology2007 Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2007.358057(634-636)Online publication date: Jan-2007

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