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Timing-driven Steiner trees are (practically) free

Published:24 July 2006Publication History

ABSTRACT

Traditionally, rectilinear Steiner minimum trees (RSMT) are widely used for routing estimation in design optimizations like floorplanning and physical synthesis. Since it optimizes wirelength, an RSMT may take a "non-direct" route to a sink, which may give the designer an unnecessarily pessimistic view of the delay to the sink.Previous works have addressed this issue through performance-driven constructions, minimum Steiner arborescence, and critical sink based Steiner constructions. Physical synthesis and routing flows have been reticent to adapt universal timing-driven Steiner constructions out of fear that they are too expensive (in terms of routing resource and capacitance). This paper studies several different performance-driven Steiner tree constructions in order to show which ones have superior performance.A key result is that they add at most 2%-4% extra capacitance, and are thus a promising avenue for today's increasingly aggressive performance-driven P&R flows.We demonstrate using a production P&R flow that timing-driven Steiner topologies can be easily embedded into an incremental routing subflow to obtain significantly improved timing (3.6% and 5.1% improvements in cycle time for two industry testcases) at practically no cost of wirelength or routability.

References

  1. Personal communication with Dr. Weiping Shi.Google ScholarGoogle Scholar
  2. C. J. Alpert, T. C. Hu, J. H. Huang, A. B. Kahng, and D. Karger. Prim-dijkstra tradeoffs for improved performance-driven routing tree design. IEEE TCAD, 14(7):890--896, July 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. K. D. Boese, A. B. Kahng, B. A. McCoy, and G. Robins. Near-optimal critical sink routing tree constructions. IEEE TCAD, 14(12):1417--36, Dec. 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. M. Borah, R. M. Owens, and M. J. Irwin. An edge-based heuristic for Steiner routing. IEEE TCAD, 13(12):1563--1568, Dec. 1994.Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. M. Borah, R. M. Owens, and M. J. Irwin. A fast and simple Steiner routing heuristic. Discrete Applied Mathematics, 90:51--67, 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. C. Chu and Y.-C. Wong. Fast and accurate rectilinear steiner minimal tree algorithm for vlsi design. In ISPD, pp. 28--35, 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. J. Cong, A. B. Kahng, and K.-S. Leung. Efficient algorithms for the minimum shortest path Steiner arborescence problem with applications to vlsi physical design. IEEE TCAD, 17(1):24--39, Jan. 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. J. Cong, A. B. Kahng, G. Robins, M. Sarrafzadeh, and C. K. Wong. Provably good performance-driven global routing. IEEE TCAD, 11(6):739--752, June 1992.Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. J. Cordova and Y. H. Lee. A heuristic algorithm for the rectilinear Steiner arborescence problem. Tech. Report, CIS Department, Univ. of Florida, (TR 94-025), 1994.Google ScholarGoogle Scholar
  10. J. Griffith, G. Robins, J. Salowe, and T. Zhang. Closing the gap: Near-optimal Steiner trees in polynomial time. IEEE TCAD, 13:1351--1365. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. A. B. Kahng and G.Robins. On optimal interconnections for VLSI. Kluwer Academic Publishers, Boston, MA, 1995.Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. S. Khuller, B. Raghavachari, and N. Young. Balancing minimum spanning trees and shortest-path trees. ACM-SIAM SODA, pp. 243--250, 1993. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. G. Kortsarz and D. Peleg. Approximating shallow-light trees. ACM-SIAM SODA, pp. 103--110, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. P. Madden. BOI source code. http://vlsicad.ucsd.edu/GSRC/bookshelf/Slots/RSMT/ Madden_BOI.html.Google ScholarGoogle Scholar
  15. M. Marathe, R. Ravi, R. Sundaram, S. Ravi, and D. Rosenkrantz. Bicriteria network design problems. In Intl. Colloquium Automata Languages and Programming (ICALP'95), pp. 487--498, 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. J. Naor and B. Schieber. Improved approximations for shallow-light spanning trees. FOCS, page 536, 1997. IEEE Computer Society. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. S. Peyer, M. Zachariasen, and D. G. Jørgensen. Delay-related secondary objectives for rectilinear Steiner minimum trees. Discrete Appl. Math., 136(2-3):271--298, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. W. Qiu and W. Shi. Minimum moment Steiner trees. SODA, pp. 488--495, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. S. K. Rao, P. Sadayappan, F. K. Hwang, and P. W. Shor. The rectilinear Steiner arborescence problem. Algorithmica, 7:277--288, 1992.Google ScholarGoogle ScholarCross RefCross Ref
  20. J. Soukup. Uniform steiner tree representation from the floor planning to the final routing. Unpublished manuscript.Google ScholarGoogle Scholar
  21. D. M. Warme, P. Winter, and M. Zachariesen. Exact algorithms for plane Steiner tree problems: A computational study. pp. 81--116, 2000.Google ScholarGoogle Scholar

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        cover image ACM Conferences
        DAC '06: Proceedings of the 43rd annual Design Automation Conference
        July 2006
        1166 pages
        ISBN:1595933816
        DOI:10.1145/1146909

        Copyright © 2006 ACM

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        • Published: 24 July 2006

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