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An energy-efficient virtual memory system with flash memory as the secondary storage

Published: 04 October 2006 Publication History

Abstract

The traditional virtual memory system is designed for decades assuming a magnetic disk as the secondary storage. Recently, flash memory becomes a popular storage alternative for many portable devices with the continuing improvements on its capacity, reliability and much lower power consumption than mechanical hard drives. The NAND flash memory is organized with blocks, and each block contains a set of pages. The characteristics of flash memory are quite different from a magnetic disk. Therefore, in this paper, we revisit virtual memory system design considering limitations imposed by flash memory. In particular, we study the effects of the subpaging technique and storage cache management.In the traditional virtual memory system, a full page is written back to the secondary storage on a page fault. We found that this could result in unnecessary writes thereby wasting energy. The subpaging technique that partitions a page into subunits, and only dirty subpages are written to flash memory is beneficial to the energy efficiency. For the storage cache management, unlike traditional disk cache management, care needs to be taken to guarantee that the flash pages of a main memory page are replaced from the cache in sequence. Experimental results show that the average energy reduction of combined subpaging and caching techniques is 35.6%.

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cover image ACM Conferences
ISLPED '06: Proceedings of the 2006 international symposium on Low power electronics and design
October 2006
446 pages
ISBN:1595934626
DOI:10.1145/1165573
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

Publication History

Published: 04 October 2006

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Author Tags

  1. NAND flash memory
  2. embedded storages
  3. embedded systems
  4. page replacement
  5. virtual memory

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ISLPED06
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ISLPED06: International Symposium on Low Power Electronics and Design
October 4 - 6, 2006
Bavaria, Tegernsee, Germany

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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  • (2024)Optimizing Data Retrieval from Secondary Storage with a Proactive Intermediate CacheSoutheastCon 202410.1109/SoutheastCon52093.2024.10500105(216-221)Online publication date: 15-Mar-2024
  • (2021)Bridging Mismatched Granularity Between Embedded File Systems and Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.303681440:10(2024-2035)Online publication date: Oct-2021
  • (2019)ReRAM Non-Volatile AES Encryption Engine for IoT Application2019 32nd IEEE International System-on-Chip Conference (SOCC)10.1109/SOCC46988.2019.1570548234(359-364)Online publication date: Sep-2019
  • (2018)Self-Adaptive Filtering Algorithm with PCM-Based Memory Storage SystemACM Transactions on Embedded Computing Systems10.1145/319085617:3(1-23)Online publication date: 22-May-2018
  • (2018)Subpage-Aware Solid State Drive for Improving Lifetime and PerformanceIEEE Transactions on Computers10.1109/TC.2018.282703367:10(1492-1505)Online publication date: 1-Oct-2018
  • (2016)A Methodology for Estimating Performance and Power Consumption of Embedded Flash File SystemsACM Transactions on Embedded Computing Systems10.1145/290313915:4(1-25)Online publication date: 2-Aug-2016
  • (2013)Lifetime and QoS-aware energy-saving buffering schemesJournal of Systems and Software10.1016/j.jss.2013.01.01486:5(1408-1425)Online publication date: 1-May-2013
  • (2011)A Power-Aware Based Storage Architecture for High Performance ComputingProceedings of the 2011 IEEE International Conference on High Performance Computing and Communications10.1109/HPCC.2011.13(17-24)Online publication date: 2-Sep-2011
  • (2010)SieveStoreACM SIGARCH Computer Architecture News10.1145/1816038.181598238:3(163-174)Online publication date: 19-Jun-2010
  • (2010)SieveStoreProceedings of the 37th annual international symposium on Computer architecture10.1145/1815961.1815982(163-174)Online publication date: 19-Jun-2010
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