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ASID '06: Proceedings of the 1st workshop on Architectural and system support for improving software dependability
ACM2006 Proceeding
Publisher:
  • Association for Computing Machinery
  • New York
  • NY
  • United States
Conference:
ASPLOS06: Architectural Support for Programming Languages and Operating Systems San Jose California 21 October 2006
ISBN:
978-1-59593-576-2
Published:
21 October 2006
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Abstract

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Article
Is process or architecture the solution?

The call for papers for this workshop starts with the observation that software still has bugs, despite considerable investment and improvement in software development process. Software has always had bugs, and as far as I can tell, it will always have ...

Article
Manitou: a layer-below approach to fighting malware

Unbeknownst to many computer users, their machines are running malware. Others are aware that strange software inhabits their machine, but cannot get rid of it. In this paper, we present Manitou, a system that provides users with the ability to assign, ...

Article
Hunting Trojan Horses

HTH (Hunting Trojan Horses) is a security framework developed for detecting difficult types of intrusions. HTH is intended as a complement to anti-virus software in that it targets unknown and zero-day Trojan Horses and Backdoors. In order to accurately ...

Article
Improving software security via runtime instruction-level taint checking

Current taint checking architectures monitor tainted data usage mainly with control transfer instructions. An alarm is raised once the program counter becomes tainted. However, such architectures are not effective against non-control data attacks. In ...

Article
Have things changed now?: an empirical study of bug characteristics in modern open source software

Software errors are a major cause for system failures. To effectively design tools and support for detecting and recovering from software failures requires a deep understanding of bug characteristics. Recently, software and its development process have ...

Article
Accurate and efficient filtering for the Intel thread checker race detector

Debugging data races in parallel applications is a difficult task. Error-causing data races may appear to vanish due to changes in an application's optimization level, thread scheduling, whether or not a debugger is used, and other effects. Further, ...

Article
Architectural support for software-based protection

Control-Flow Integrity (CFI) is a property that guarantees program control flow cannot be subverted by a malicious adversary, even if the adversary has complete control of data memory. We have shown in prior work how CFI can be enforced by using inlined ...

Article
Tradeoffs in fine-grained heap memory protection

Different uses of memory protection schemes have different needs in terms of granularity. For example, heap security can benefit from chunk separation (by using protected "padding" boundaries) and meta-data protection. However, such protection can be ...

Article
Dependable ≠ unaffordable

This paper presents a software architecture for hardware fault tolerance based on loosely-synchronized, redundant virtual machines (LSRVM). LSRVM will provide high levels of reliability by tolerating hardware faults at all levels of the system. ...

Article
Log-based architectures for general-purpose monitoring of deployed code

Runtime monitoring tools are invaluable for detecting various types of bugs, in both sequential and multi-threaded programs. However, these tools often slow down the monitored program by an order of magnitude or more [4], implying that the tools are ill-...

Article
ExecRecorder: VM-based full-system replay for attack analysis and system recovery

Log-based recovery and replay systems are important for system reliability, debugging and postmortem analysis/recovery of malware attacks. These systems must incur low space and performance overhead, provide full-system replay capabilities, and be ...

Article
SecCMP: a secure chip-multiprocessor architecture

Security has been considered as an important issue in processor design. Most of the existing mechanisms address security and integrity issues caused by untrusted main memory in single-core systems. In this paper, we propose a secure Chip-Multiprocessor ...

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