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Conjoining soft-core FPGA processors

Published: 05 November 2006 Publication History

Abstract

Soft-core programmable processors on field-programmable gate arrays (FPGAs) can be custom synthesized to instantiate only those hardware units, such as multipliers and floating-point units, that an application requires to meet performance demands, thus minimizing soft-core size on the FPGA. Conjoining processors, meaning to share hardware units among two or more processors, can further reduce soft-core size, leaving more resources for other circuits such as custom coprocessors. Using Xilinx MicroBlaze coprocessors and standard embedded system benchmarks, we show that conjoining two processors can provide 16% processor size reductions on average, with less than 1% cycle count overhead. We introduce an efficient dynamic-programming-based exploration method to find the best custom instantiation of hardware units, considering both standalone and conjoined options, for soft-core processors.

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Cited By

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  • (2010)MB-LITEProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871169(997-1000)Online publication date: 8-Mar-2010
  • (2008)A field programmable gate array media player for realmedia filesJournal of Computing Sciences in Colleges10.5555/1352383.135240823:6(133-139)Online publication date: 1-Jun-2008
  • (2008)A stream chip-multiprocessor for bioinformaticsACM SIGARCH Computer Architecture News10.1145/1399972.139997636:2(2-9)Online publication date: 1-May-2008

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cover image ACM Conferences
ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
November 2006
147 pages
ISBN:1595933891
DOI:10.1145/1233501
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 05 November 2006

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Author Tags

  1. FPGAs
  2. conjoined processors
  3. customization
  4. parameterized platforms
  5. soft-core processors
  6. tuning

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Cited By

View all
  • (2010)MB-LITEProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871169(997-1000)Online publication date: 8-Mar-2010
  • (2008)A field programmable gate array media player for realmedia filesJournal of Computing Sciences in Colleges10.5555/1352383.135240823:6(133-139)Online publication date: 1-Jun-2008
  • (2008)A stream chip-multiprocessor for bioinformaticsACM SIGARCH Computer Architecture News10.1145/1399972.139997636:2(2-9)Online publication date: 1-May-2008

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