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View all- Sun JXiao LTian JZhou HRoveda J(2016)Surrogating circuit design solutions with robustness metricsIntegration, the VLSI Journal10.1016/j.vlsi.2015.07.01552:C(1-9)Online publication date: 1-Jan-2016
SRAM has become the dominant block in modern ICs and constitutes more than 50% of the die area. The increase of process variations with continued CMOS technology scaling is considered one of the major challenges for SRAM designers. This process ...
Leakage current has become a stringent constraint in modern processor designs in addition to traditional constraints on frequency. Since leakage current exhibits a strong inverse correlation with circuit delay, effective parametric yield prediction must ...
In this paper, for the first time impact of fin shape variation on 22-nm technology node strained silicon-on-insulator (SSOI) n-FinFET has been examined. With 3D-TCAD simulator, the electrical characteristics are analyzed and compared for devices with ...
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