Article

Automatic generation of embedded communication SW for heterogeneous MPSoC platforms

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LCTES '07: Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems

Pages 143 - 145

https://doi.org/10.1145/1254766.1254792

Published: 13 June 2007 Publication History

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Abstract

This paper addresses the problem of long design cycle of MPSoCs communication SW with automatic synthesis. The tool we propose takes as input a transaction level model (TLM) of MPSoC communication and outputs pin and cycle-accurate (PCA) bus drivers that can be linked to the synthesizable PCA model (PCAM).

The TL communication is simple since TLM channels abstract away protocol details. PCAM communication, in turn, includes explicit definitions for each signal and pin. However, in most cases the TLMs are not suitable for implementation since they do not reflect the MPSoC platform. Usually the designers simulate (fast) TLMs, then manually implement PCA communication.

Our communication SW synthesis transforms TL send and receive functions into platform specific PCAM bus drivers which can be automatically downloaded to the FPGA board. The presented results demonstrate the significant productivity gain achieved with our tool, with no great cost to either code size or system performance.

References

[1]

OSCI. http://www.systemc.org/.

Google Scholar

[2]

Thorsten Grötker, Stan Liao, Grant Martin, and Stuart Swan, System Design with SystemC. Kluwer Academic Publishers, 2002.

Digital Library

Google Scholar

[3]

Daniel D. Gajski, Jianwen Zhu, Rainer Dömer, Andreas Gerstlauer, and Shuqing Zhao, SpecC: Specification Language and Design Methodology. Kluwer Academic Publishers, 2000.

Crossref

Google Scholar

[4]

Andreas Gerstlauer, Rainer Dömer, Junyu Peng, and Daniel D. Gajski, System Design: A Practical Guide with SpecC. Kluwer Academic Publishers, 2001.

Digital Library

Google Scholar

[5]

Accellera. SystemVerilog 3.0, In http://www.accellera.org.

Google Scholar

Cited By

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Chagoya-Garzon ARousseau FPetrot F(2012)Multi-device Driver Synthesis Flow for Heterogeneous Hierarchical SystemsProceedings of the 2012 15th Euromicro Conference on Digital System Design10.1109/DSD.2012.88(389-396)Online publication date: 5-Sep-2012
https://dl.acm.org/doi/10.1109/DSD.2012.88
Cho HAbdi S(2011)Automatic generation of transducer models for multicore system designProceedings of the 2011 IEEE International High Level Design Validation and Test Workshop10.1109/HLDVT.2011.6114168(72-79)Online publication date: 9-Nov-2011
https://dl.acm.org/doi/10.1109/HLDVT.2011.6114168
Shen HPétrot FLin Y(2010)A flexible hybrid simulation platform targeting multiple configurable processors SoCProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899754(155-160)Online publication date: 18-Jan-2010
https://dl.acm.org/doi/10.5555/1899721.1899754
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Index Terms

Automatic generation of embedded communication SW for heterogeneous MPSoC platforms
1. Software and its engineering
  1. Software creation and management
    1. Designing software
      1. Software implementation planning
        Software design techniques
    2. Software development process management
      1. Software development methods

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Published In

LCTES '07: Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems

June 2007

258 pages

ISBN:9781595936325

DOI:10.1145/1254766

General Chair:
Santosh Pande
Georgia Institute of Technology, USA
,
Program Chair:
Zhiyuan Li
Purdue University, USA

ACM SIGPLAN Notices Volume 42, Issue 7
Proceedings of the 2007 LCTES conference
July 2007
241 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1273444
Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 13 June 2007

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LCTES 07

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LCTES 07: ACM SIGBED-SIGPLAN Conference on Languages, Compilers and Tools for Embedded Systems

June 13 - 15, 2007

California, San Diego, USA

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Overall Acceptance Rate 116 of 438 submissions, 26%

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Cited By

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Chagoya-Garzon ARousseau FPetrot F(2012)Multi-device Driver Synthesis Flow for Heterogeneous Hierarchical SystemsProceedings of the 2012 15th Euromicro Conference on Digital System Design10.1109/DSD.2012.88(389-396)Online publication date: 5-Sep-2012
https://dl.acm.org/doi/10.1109/DSD.2012.88
Cho HAbdi S(2011)Automatic generation of transducer models for multicore system designProceedings of the 2011 IEEE International High Level Design Validation and Test Workshop10.1109/HLDVT.2011.6114168(72-79)Online publication date: 9-Nov-2011
https://dl.acm.org/doi/10.1109/HLDVT.2011.6114168
Shen HPétrot FLin Y(2010)A flexible hybrid simulation platform targeting multiple configurable processors SoCProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899754(155-160)Online publication date: 18-Jan-2010
https://dl.acm.org/doi/10.5555/1899721.1899754
Shen HPetrot F(2010)A flexible hybrid simulation platform targeting multiple configurable processors SoC2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2010.5419904(155-160)Online publication date: Jan-2010
https://doi.org/10.1109/ASPDAC.2010.5419904
Schirner GGerstlauer ADömer RKyung CChoi KHa S(2008)Automatic generation of hardware dependent software for MPSoCs from abstract system specificationsProceedings of the 2008 Asia and South Pacific Design Automation Conference10.5555/1356802.1356870(271-276)Online publication date: 21-Jan-2008
https://dl.acm.org/doi/10.5555/1356802.1356870
Schirner GGerstlauer ADomer R(2008)Automatic generation of hardware dependent software for MPSoCs from abstract system specifications2008 Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2008.4483954(271-276)Online publication date: Jan-2008
https://doi.org/10.1109/ASPDAC.2008.4483954

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