Joachim Becker
ABSTRACT
This work presents a novel approach to filter synthesis on a fieldprogrammable analog array (FPAA) architecture using a genetic algorithm (GA). First, a Matlab model of the FPAA is created and verified for compliance with transistor-level simulations of the FPAA. Using this model, differentfilter structures are built using an active-RC approach and evaluated. Secondly, a robust genetic algorithm is implemented in Matlab, which allows synthesis of analog filters on the given structure. Optimal parameters and operators of the genetic algorithm are identified by gradual adaptation andperformance evaluation, and the general feasibility is shown. Finally, the GA is used to overcome quantization-limitations of the FPAA structure and find configurations of filters, which would not have been achievable with traditional synthesis methods.
The system is not only a platform for theoretical investigation offilter structures on the given chip structure but also provides aframework for evolution and instantiation of filters on actual chiphardware.
- J. Becker, F. Henrici, and Y. Manoli. System-level analog simulation of a mixed-signal continuous-time field programmable analog array. IEEE International Workshop System-on-Chip for Real-Time Applications (IWSOC), 2005. Google Scholar
Digital Library
- J. Becker and Y. Manoli. A continuous-time field programmable analog array (fpaa) consisting of digitally reconfigurable gm-cells. IEEE International Symposium on Circuits and Systems (ISCAS), 2004.Google Scholar
- T. S. Hall, C. M. Twigg, J. D. Gray, P. Hasler, and D. V. Anderson. Large-scale field-programmable analog arrays for analog signal processing. IEEE Transactions on Circuits and Systems I, vol. 52, pp. 2298 -- 2307, 2005.Google Scholar
- F. Henrici, J. Becker, A. Buhmann, M. Ortmanns, and Y. Manoli. A continuous-time field programmable analog array using parasitic capacitance gm-c filters. IEEE International Symposium on Circuits and Systems (ISCAS), 2007.Google ScholarCross Ref
- J. Langeheine, J. Becker, S. Folling, J. Schemmel, and K. Meier. A CMOS FPTA Chip for Intrinsic Hardware Evolution of Analog Electronic Circuits. In The Third NASA/DoD workshop on Evolvable Hardware. IEEE, 2001. Google ScholarDigital Library
- S. Pavan and Y. Tsividis. High Frequency Continuous Time Filters in Digital CMOS Processes. Kluwer Academic Publishers, Boston, 2000. Google ScholarDigital Library
- A. Stoica, D. Keymeulen, R. Zebulum, A. Thakoor, T. Daud, Y. Klimeck, R. Tawel, and V. Duong. Evolution of analog circuits on field programmable transistor arrays. In The Second NASA/DoD workshop on Evolvable Hardware. IEEE, 2000. Google ScholarDigital Library
Index Terms
- Synthesis of analog filters on an evolvable hardware platform using a genetic algorithm
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