article

Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors

Authors:

Yuki Kobayashi,

Murali Jayapala,

Praveen Raghavan,

Francky Catthoor,

Masaharu ImaiAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 12, Issue 4

Pages 41 - es

https://doi.org/10.1145/1278349.1278354

Published: 01 September 2007 Publication History

Abstract

Clustering L0 buffers is effective for energy reduction in the instruction memory hierarchy of embedded VLIW processors. However, the efficiency of the clustering depends on the schedule of the target application. Especially in heterogeneous or data clustered VLIW processors, determining energy efficient scheduling is more constraining.

This article proposes a realistic technique supported by a tool flow to explore operation shuffling for improving generation of L0 clusters. The tool flow explores assignment of operations for each cycle and generates various schedules. This approach makes it possible to reduce energy consumption for various processor architectures. However, the computational complexity is large because of the huge exploration space. Therefore, some heuristics are also developed, which reduce the size of the exploration space while the solution quality remains reasonable. Furthermore, we also propose a technique to support VLIW processors with multiple data clusters, which is essential to apply the methodology to real world processors.

The experimental results indicate potential gains of up to 27.6% in energy in L0 buffers, through operation shuffling for heterogeneous processor architectures as well as a homogeneous architecture. Furthermore, the proposed heuristics drastically reduce the exploration search space by about 90%, while the results are comparable to full search, with average differences of less than 1%. The experimental results indicate that energy efficiency can be improved in most of the media benchmarks by the proposed methodology, where the average gain is around 10% in comparison with generating clusters without operation shuffling.

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Cited By

Catthoor FRaghavan PLambrechts AJayapala MKritikakou AAbsar JCatthoor FRaghavan PLambrechts AJayapala MKritikakou AAbsar J(2010)Overall Framework for ExplorationUltra-Low Energy Domain-Specific Instruction-Set Processors10.1007/978-90-481-9528-2_4(83-113)Online publication date: 3-Jul-2010
https://doi.org/10.1007/978-90-481-9528-2_4

Index Terms

Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors
1. Software and its engineering
  1. Software notations and tools
    1. Compilers

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 12, Issue 4

September 2007

449 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/1278349

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Copyright © 2007 ACM.

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 September 2007

Published in TODAES Volume 12, Issue 4

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Cited By

Catthoor FRaghavan PLambrechts AJayapala MKritikakou AAbsar JCatthoor FRaghavan PLambrechts AJayapala MKritikakou AAbsar J(2010)Overall Framework for ExplorationUltra-Low Energy Domain-Specific Instruction-Set Processors10.1007/978-90-481-9528-2_4(83-113)Online publication date: 3-Jul-2010
https://doi.org/10.1007/978-90-481-9528-2_4

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