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Clock skew scheduling with race conditions considered

Published: 01 September 2007 Publication History

Abstract

In this article, we provide a fresh viewpoint to the interactions between clock skew scheduling and delay insertion. A race-condition-aware (RCA) clock skew scheduling is proposed to determine the clock skew schedule by taking race conditions (i.e., hold violations) into account. Our objective is not only to optimize the clock period, but also to minimize heuristically the required inserted delay. Compared with previous work, our major contribution includes the following two aspects. First, our approach achieves exactly the same results, but has significant improvement in time complexity. Second, our viewpoint can be generalized to other sequential timing optimization techniques.

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    cover image ACM Transactions on Design Automation of Electronic Systems
    ACM Transactions on Design Automation of Electronic Systems  Volume 12, Issue 4
    September 2007
    449 pages
    ISSN:1084-4309
    EISSN:1557-7309
    DOI:10.1145/1278349
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    Association for Computing Machinery

    New York, NY, United States

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    Publication History

    Published: 01 September 2007
    Published in TODAES Volume 12, Issue 4

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    Author Tags

    1. Sequential circuits
    2. logic synthesis
    3. performance optimization
    4. timing optimization

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